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For PR950:

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Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer
2006-10-26 06:15:43 +00:00
parent 7043d00750
commit 1628cec4d7
32 changed files with 3086 additions and 1944 deletions
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8
lib/VMCore/Instruction.cpp
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@@ -94,7 +94,9 @@ const char *Instruction::getOpcodeName(unsigned OpCode) {
case Add: return "add";
case Sub: return "sub";
case Mul: return "mul";
case Div: return "div";
case UDiv: return "udiv";
case SDiv: return "sdiv";
case FDiv: return "fdiv";
case Rem: return "rem";
// Logical operators...
@@ -221,7 +223,9 @@ bool Instruction::isComparison(unsigned op) {
///
bool Instruction::isTrapping(unsigned op) {
switch(op) {
case Div:
case UDiv:
case SDiv:
case FDiv:
case Rem:
case Load:
case Store: