6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-01-28 08:35:02 +00:00
parent f4646d9902
commit 1632782fe9
3 changed files with 40 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
test/CodeGen/X86/swizzle.ll Normal file
View File

@@ -0,0 +1,19 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movlps
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movups
; rdar://6523650
%struct.vector4_t = type { <4 x float> }
define void @swizzle(i8* nocapture %a, %struct.vector4_t* nocapture %b, %struct.vector4_t* nocapture %c) nounwind {
entry:
%0 = getelementptr %struct.vector4_t* %b, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
%1 = load <4 x float>* %0, align 4 ; <<4 x float>> [#uses=1]
%tmp.i = bitcast i8* %a to double* ; <double*> [#uses=1]
%tmp1.i = load double* %tmp.i ; <double> [#uses=1]
%2 = insertelement <2 x double> undef, double %tmp1.i, i32 0 ; <<2 x double>> [#uses=1]
%tmp2.i = bitcast <2 x double> %2 to <4 x float> ; <<4 x float>> [#uses=1]
%3 = shufflevector <4 x float> %1, <4 x float> %tmp2.i, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
store <4 x float> %3, <4 x float>* %0, align 4
ret void
}