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AVX-512: fixed a compare pattern

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199366 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky 2014-01-16 08:45:54 +00:00
parent c3ab5de57c
commit 165f7ac98f
2 changed files with 19 additions and 6 deletions
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16
lib/Target/X86/X86ISelLowering.cpp
View File

@ -9544,6 +9544,11 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
SelectionDAG &DAG) const {
SDLoc dl(Op);
if (Op.getValueType() == MVT::i1)
// KORTEST instruction should be selected
return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
DAG.getConstant(0, Op.getValueType()));
// CF and OF aren't always set the way we want. Determine which
// of these we need.
bool NeedCF = false;
@ -9560,15 +9565,14 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
NeedOF = true;
break;
}
// See if we can use the EFLAGS value from the operand instead of
// doing a separate TEST. TEST always sets OF and CF to 0, so unless
// we prove that the arithmetic won't overflow, we can't use OF or CF.
if (Op.getResNo() != 0 || NeedOF || NeedCF) {
// Emit a CMP with 0, which is the TEST pattern.
if (Op.getValueType() == MVT::i1)
return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
DAG.getConstant(0, MVT::i1));
//if (Op.getValueType() == MVT::i1)
// return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
// DAG.getConstant(0, MVT::i1));
return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
DAG.getConstant(0, Op.getValueType()));
}
@ -9762,10 +9766,10 @@ SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
return EmitTest(Op0, X86CC, DAG);
if (Op0.getValueType() == MVT::i1) {
// invert the value
Op0 = DAG.getNode(ISD::XOR, dl, MVT::i1, Op0,
DAG.getConstant(-1, MVT::i1));
return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op0,
DAG.getConstant(0, MVT::i1));
return EmitTest(Op0, X86CC, DAG);
}
}

9
test/CodeGen/X86/avx512-cmp.ll
View File

@ -96,3 +96,12 @@ entry:
ret i32 %or
}
define i32 @test8(i32 %a1, i32 %a2, i32 %a3) {
%tmp1 = icmp eq i32 %a1, -1
%tmp2 = icmp eq i32 %a2, -2147483648
%tmp3 = and i1 %tmp1, %tmp2
%tmp4 = icmp eq i32 %a3, 0
%tmp5 = or i1 %tmp3, %tmp4
%res = select i1 %tmp5, i32 1, i32 %a3
ret i32 %res
}