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Remove unnecessary duplicate instruction definitions that simply overloaded the type of VEXT. This can be achieved with a Pat definition, and is much more disassembler friendly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135283 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-07-15 17:48:05 +00:00
parent 32fb2af679
commit 167eb1f903
1 changed files with 8 additions and 9 deletions
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17
lib/Target/ARM/ARMInstrNEON.td
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@ -4704,11 +4704,10 @@ def VEXTd32 : VEXTd<"vext", "32", v2i32> {
let Inst{11-10} = index{1-0};
let Inst{9-8} = 0b00;
}
def VEXTdf : VEXTd<"vext", "32", v2f32> {
let Inst{11-10} = index{1-0};
let Inst{9-8} = 0b00;
}
def : Pat<(v2f32 (NEONvext (v2f32 DPR:$Vn),
(v2f32 DPR:$Vm),
(i32 imm:$index))),
(VEXTd32 DPR:$Vn, DPR:$Vm, imm:$index)>;
def VEXTq8 : VEXTq<"vext", "8", v16i8> {
let Inst{11-8} = index{3-0};
@ -4721,10 +4720,10 @@ def VEXTq32 : VEXTq<"vext", "32", v4i32> {
let Inst{11-10} = index{1-0};
let Inst{9-8} = 0b00;
}
def VEXTqf : VEXTq<"vext", "32", v4f32> {
let Inst{11-10} = index{1-0};
let Inst{9-8} = 0b00;
}
def : Pat<(v4f32 (NEONvext (v4f32 QPR:$Vn),
(v4f32 QPR:$Vm),
(i32 imm:$index))),
(VEXTq32 QPR:$Vn, QPR:$Vm, imm:$index)>;
// VTRN : Vector Transpose