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Remove store forms of DEC/INC from isDefConvertible. Since they are stores they don't have a register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170303 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3153,18 +3153,14 @@ inline static bool isDefConvertible(MachineInstr *MI) {
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case X86::SUB16rr: case X86::SUB8rr: case X86::SUB64rm:
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case X86::SUB32rm: case X86::SUB16rm: case X86::SUB8rm:
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case X86::DEC64r: case X86::DEC32r: case X86::DEC16r: case X86::DEC8r:
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case X86::DEC64m: case X86::DEC32m: case X86::DEC16m: case X86::DEC8m:
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case X86::DEC64_32r: case X86::DEC64_16r:
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case X86::DEC64_32m: case X86::DEC64_16m:
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case X86::ADD64ri32: case X86::ADD64ri8: case X86::ADD32ri:
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case X86::ADD32ri8: case X86::ADD16ri: case X86::ADD16ri8:
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case X86::ADD8ri: case X86::ADD64rr: case X86::ADD32rr:
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case X86::ADD16rr: case X86::ADD8rr: case X86::ADD64rm:
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case X86::ADD32rm: case X86::ADD16rm: case X86::ADD8rm:
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case X86::INC64r: case X86::INC32r: case X86::INC16r: case X86::INC8r:
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case X86::INC64m: case X86::INC32m: case X86::INC16m: case X86::INC8m:
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case X86::INC64_32r: case X86::INC64_16r:
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case X86::INC64_32m: case X86::INC64_16m:
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case X86::AND64ri32: case X86::AND64ri8: case X86::AND32ri:
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case X86::AND32ri8: case X86::AND16ri: case X86::AND16ri8:
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case X86::AND8ri: case X86::AND64rr: case X86::AND32rr:
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