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Remove the "common" set of instructions shared between ARM and Thumb2 modes. This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139268 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-09-08 00:11:18 +00:00
parent f0eee6eca8
commit 170580e8f4
2 changed files with 0 additions and 20 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -4320,7 +4320,6 @@ class ACI<dag oops, dag iops, string opc, string asm,
}
multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
let DecoderNamespace = "Common" in {
def _OFFSET : ACI<(outs),
!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
!strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
@ -4416,7 +4415,6 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
let Inst{20} = load;
let DecoderMethod = "DecodeCopMemInstruction";
}
}
}
defm LDC : LdStCop<{?,?,?,?}, 1, (ins pred:$p), "ldc", "${p}">;

18
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -342,16 +342,6 @@ DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
return result;
}
// Instructions that are shared between ARM and Thumb modes.
// FIXME: This shouldn't really exist. It's an artifact of the
// fact that we fail to encode a few instructions properly for Thumb.
MI.clear();
result = decodeCommonInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
}
// VFP and NEON instructions, similarly, are shared between ARM
// and Thumb modes.
MI.clear();
@ -594,14 +584,6 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
return result;
}
MI.clear();
result = decodeCommonInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);
return result;
}
MI.clear();
result = decodeVFPInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {