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Remove unused files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227829 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
parent
fb29a70867
commit
1754d31c4b
@ -1,206 +0,0 @@
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//===-- llvm/CallingConvLower.cpp - Calling Convention lowering -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Hexagon_CCState class, used for lowering and
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// implementing calling conventions. Adapted from the machine independent
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// version of the class (CCState) but this handles calls to varargs functions
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//
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//===----------------------------------------------------------------------===//
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#include "HexagonCallingConvLower.h"
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#include "Hexagon.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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Hexagon_CCState::Hexagon_CCState(CallingConv::ID CC, bool isVarArg,
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const TargetMachine &tm,
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SmallVectorImpl<CCValAssign> &locs,
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LLVMContext &c)
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: CallingConv(CC), IsVarArg(isVarArg), TM(tm), Locs(locs), Context(c) {
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// No stack is used.
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StackOffset = 0;
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UsedRegs.resize(
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(TM.getSubtargetImpl()->getRegisterInfo()->getNumRegs() + 31) / 32);
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}
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// HandleByVal - Allocate a stack slot large enough to pass an argument by
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// value. The size and alignment information of the argument is encoded in its
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// parameter attribute.
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void Hexagon_CCState::HandleByVal(unsigned ValNo, EVT ValVT,
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EVT LocVT, CCValAssign::LocInfo LocInfo,
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int MinSize, int MinAlign,
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ISD::ArgFlagsTy ArgFlags) {
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unsigned Align = ArgFlags.getByValAlign();
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unsigned Size = ArgFlags.getByValSize();
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if (MinSize > (int)Size)
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Size = MinSize;
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if (MinAlign > (int)Align)
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Align = MinAlign;
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unsigned Offset = AllocateStack(Size, Align);
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addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset,
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LocVT.getSimpleVT(), LocInfo));
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}
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void Hexagon_CCState::MarkAllocated(unsigned Reg) {
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const TargetRegisterInfo &TRI = *TM.getSubtargetImpl()->getRegisterInfo();
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for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
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UsedRegs[*AI/32] |= 1 << (*AI&31);
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}
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/// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node,
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/// incorporating info about the formals into this state.
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void
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Hexagon_CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg>
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&Ins,
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Hexagon_CCAssignFn Fn,
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unsigned SretValueInRegs) {
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unsigned NumArgs = Ins.size();
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unsigned i = 0;
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// If the function returns a small struct in registers, skip
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// over the first (dummy) argument.
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if (SretValueInRegs != 0) {
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++i;
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}
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for (; i != NumArgs; ++i) {
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EVT ArgVT = Ins[i].VT;
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ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) {
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dbgs() << "Formal argument #" << i << " has unhandled type "
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<< ArgVT.getEVTString() << "\n";
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abort();
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}
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}
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}
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/// AnalyzeReturn - Analyze the returned values of an ISD::RET node,
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/// incorporating info about the result values into this state.
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void
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Hexagon_CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
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Hexagon_CCAssignFn Fn,
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unsigned SretValueInRegs) {
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// For Hexagon, Return small structures in registers.
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if (SretValueInRegs != 0) {
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if (SretValueInRegs <= 32) {
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unsigned Reg = Hexagon::R0;
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addLoc(CCValAssign::getReg(0, MVT::i32, Reg, MVT::i32,
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CCValAssign::Full));
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return;
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}
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if (SretValueInRegs <= 64) {
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unsigned Reg = Hexagon::D0;
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addLoc(CCValAssign::getReg(0, MVT::i64, Reg, MVT::i64,
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CCValAssign::Full));
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return;
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}
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}
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// Determine which register each value should be copied into.
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for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
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EVT VT = Outs[i].VT;
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ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
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if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){
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dbgs() << "Return operand #" << i << " has unhandled type "
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<< VT.getEVTString() << "\n";
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abort();
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}
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}
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}
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/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
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/// about the passed values into this state.
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void
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Hexagon_CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg>
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&Outs,
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Hexagon_CCAssignFn Fn,
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int NonVarArgsParams,
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unsigned SretValueSize) {
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unsigned NumOps = Outs.size();
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unsigned i = 0;
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// If the called function returns a small struct in registers, skip
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// the first actual parameter. We do not want to pass a pointer to
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// the stack location.
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if (SretValueSize != 0) {
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++i;
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}
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for (; i != NumOps; ++i) {
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EVT ArgVT = Outs[i].VT;
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ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this,
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NonVarArgsParams, i+1, false)) {
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dbgs() << "Call operand #" << i << " has unhandled type "
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<< ArgVT.getEVTString() << "\n";
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abort();
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}
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}
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}
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/// AnalyzeCallOperands - Same as above except it takes vectors of types
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/// and argument flags.
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void
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Hexagon_CCState::AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
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SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
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Hexagon_CCAssignFn Fn) {
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unsigned NumOps = ArgVTs.size();
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for (unsigned i = 0; i != NumOps; ++i) {
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EVT ArgVT = ArgVTs[i];
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ISD::ArgFlagsTy ArgFlags = Flags[i];
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, -1, -1,
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false)) {
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dbgs() << "Call operand #" << i << " has unhandled type "
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<< ArgVT.getEVTString() << "\n";
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abort();
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}
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}
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}
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/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
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/// incorporating info about the passed values into this state.
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void
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Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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Hexagon_CCAssignFn Fn,
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unsigned SretValueInRegs) {
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for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
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EVT VT = Ins[i].VT;
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ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
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if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this, -1, -1, false)) {
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dbgs() << "Call result #" << i << " has unhandled type "
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<< VT.getEVTString() << "\n";
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abort();
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}
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}
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}
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/// AnalyzeCallResult - Same as above except it's specialized for calls which
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/// produce a single value.
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void Hexagon_CCState::AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) {
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if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this, -1, -1,
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false)) {
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dbgs() << "Call result has unhandled type "
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<< VT.getEVTString() << "\n";
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abort();
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}
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}
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@ -1,187 +0,0 @@
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//===-- HexagonCallingConvLower.h - Calling Conventions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Hexagon_CCState class, used for lowering
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// and implementing calling conventions. Adapted from the target independent
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// version but this handles calls to varargs functions
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONCALLINGCONVLOWER_H
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#define LLVM_LIB_TARGET_HEXAGON_HEXAGONCALLINGCONVLOWER_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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//
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// Need to handle varargs.
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//
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namespace llvm {
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class TargetRegisterInfo;
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class TargetMachine;
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class Hexagon_CCState;
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class SDNode;
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struct EVT;
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/// Hexagon_CCAssignFn - This function assigns a location for Val, updating
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/// State to reflect the change.
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typedef bool Hexagon_CCAssignFn(unsigned ValNo, EVT ValVT,
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EVT LocVT, CCValAssign::LocInfo LocInfo,
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ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State,
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int NonVarArgsParams,
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int CurrentParam,
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bool ForceMem);
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/// CCState - This class holds information needed while lowering arguments and
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/// return values. It captures which registers are already assigned and which
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/// stack slots are used. It provides accessors to allocate these values.
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class Hexagon_CCState {
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CallingConv::ID CallingConv;
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bool IsVarArg;
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const TargetMachine &TM;
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SmallVectorImpl<CCValAssign> &Locs;
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LLVMContext &Context;
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unsigned StackOffset;
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SmallVector<uint32_t, 16> UsedRegs;
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public:
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Hexagon_CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &TM,
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SmallVectorImpl<CCValAssign> &locs, LLVMContext &c);
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void addLoc(const CCValAssign &V) {
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Locs.push_back(V);
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}
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LLVMContext &getContext() const { return Context; }
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const TargetMachine &getTarget() const { return TM; }
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unsigned getCallingConv() const { return CallingConv; }
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bool isVarArg() const { return IsVarArg; }
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unsigned getNextStackOffset() const { return StackOffset; }
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/// isAllocated - Return true if the specified register (or an alias) is
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/// allocated.
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bool isAllocated(unsigned Reg) const {
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return UsedRegs[Reg/32] & (1 << (Reg&31));
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}
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/// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node,
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/// incorporating info about the formals into this state.
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void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
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Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
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/// AnalyzeReturn - Analyze the returned values of an ISD::RET node,
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/// incorporating info about the result values into this state.
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void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
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Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
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/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
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/// about the passed values into this state.
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void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
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Hexagon_CCAssignFn Fn, int NonVarArgsParams,
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unsigned SretValueSize);
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/// AnalyzeCallOperands - Same as above except it takes vectors of types
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/// and argument flags.
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void AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
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SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
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Hexagon_CCAssignFn Fn);
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/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
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/// incorporating info about the passed values into this state.
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void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
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/// AnalyzeCallResult - Same as above except it's specialized for calls which
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/// produce a single value.
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void AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn);
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/// getFirstUnallocated - Return the first unallocated register in the set, or
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/// NumRegs if they are all allocated.
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unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
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for (unsigned i = 0; i != NumRegs; ++i)
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if (!isAllocated(Regs[i]))
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return i;
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return NumRegs;
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}
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/// AllocateReg - Attempt to allocate one register. If it is not available,
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/// return zero. Otherwise, return the register, marking it and any aliases
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/// as allocated.
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unsigned AllocateReg(unsigned Reg) {
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if (isAllocated(Reg)) return 0;
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MarkAllocated(Reg);
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return Reg;
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}
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/// Version of AllocateReg with extra register to be shadowed.
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unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
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if (isAllocated(Reg)) return 0;
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MarkAllocated(Reg);
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MarkAllocated(ShadowReg);
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return Reg;
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}
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/// AllocateReg - Attempt to allocate one of the specified registers. If none
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/// are available, return zero. Otherwise, return the first one available,
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/// marking it and any aliases as allocated.
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unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
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unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
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if (FirstUnalloc == NumRegs)
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return 0; // Didn't find the reg.
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// Mark the register and any aliases as allocated.
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unsigned Reg = Regs[FirstUnalloc];
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MarkAllocated(Reg);
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return Reg;
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}
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/// Version of AllocateReg with list of registers to be shadowed.
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unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
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unsigned NumRegs) {
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unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
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if (FirstUnalloc == NumRegs)
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return 0; // Didn't find the reg.
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// Mark the register and any aliases as allocated.
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unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
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MarkAllocated(Reg);
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MarkAllocated(ShadowReg);
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return Reg;
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}
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/// AllocateStack - Allocate a chunk of stack space with the specified size
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/// and alignment.
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unsigned AllocateStack(unsigned Size, unsigned Align) {
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assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
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StackOffset = ((StackOffset + Align-1) & ~(Align-1));
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unsigned Result = StackOffset;
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StackOffset += Size;
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return Result;
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}
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// HandleByVal - Allocate a stack slot large enough to pass an argument by
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// value. The size and alignment information of the argument is encoded in its
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// parameter attribute.
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void HandleByVal(unsigned ValNo, EVT ValVT,
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EVT LocVT, CCValAssign::LocInfo LocInfo,
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int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
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private:
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void MarkAllocated(unsigned Reg);
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};
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} // end namespace llvm
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#endif
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