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[mips] Define reg+imm load/store pattern templates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178407 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -503,32 +503,27 @@ let Predicates = [IsFP64bit, HasStdEnc] in {
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def : MipsPat<(f64 (fextend FGR32:$src)), (CVT_D64_S FGR32:$src)>;
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}
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// Load/Store patterns.
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// Patterns for loads/stores with a reg+imm operand.
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let AddedComplexity = 40 in {
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let Predicates = [IsN64, HasStdEnc] in {
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def : MipsPat<(f32 (load addrRegImm:$a)), (LWC1_P8 addrRegImm:$a)>;
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def : MipsPat<(store FGR32:$v, addrRegImm:$a),
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(SWC1_P8 FGR32:$v, addrRegImm:$a)>;
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def : MipsPat<(f64 (load addrRegImm:$a)), (LDC164_P8 addrRegImm:$a)>;
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def : MipsPat<(store FGR64:$v, addrRegImm:$a),
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(SDC164_P8 FGR64:$v, addrRegImm:$a)>;
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def : LoadRegImmPat<LWC1_P8, f32, load>;
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def : StoreRegImmPat<SWC1_P8, f32>;
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def : LoadRegImmPat<LDC164_P8, f64, load>;
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def : StoreRegImmPat<SDC164_P8, f64>;
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}
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let Predicates = [NotN64, HasStdEnc] in {
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def : MipsPat<(f32 (load addrRegImm:$a)), (LWC1 addrRegImm:$a)>;
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def : MipsPat<(store FGR32:$v, addrRegImm:$a),
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(SWC1 FGR32:$v, addrRegImm:$a)>;
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def : LoadRegImmPat<LWC1, f32, load>;
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def : StoreRegImmPat<SWC1, f32>;
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}
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let Predicates = [NotN64, HasMips64, HasStdEnc] in {
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def : MipsPat<(f64 (load addrRegImm:$a)), (LDC164 addrRegImm:$a)>;
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def : MipsPat<(store FGR64:$v, addrRegImm:$a),
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(SDC164 FGR64:$v, addrRegImm:$a)>;
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def : LoadRegImmPat<LDC164, f64, load>;
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def : StoreRegImmPat<SDC164, f64>;
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}
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let Predicates = [NotN64, NotMips64, HasStdEnc] in {
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def : MipsPat<(f64 (load addrRegImm:$a)), (LDC1 addrRegImm:$a)>;
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def : MipsPat<(store AFGR64:$v, addrRegImm:$a),
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(SDC1 AFGR64:$v, addrRegImm:$a)>;
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def : LoadRegImmPat<LDC1, f64, load>;
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def : StoreRegImmPat<SDC1, f64>;
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}
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}
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@ -1102,6 +1102,13 @@ def LoadAddr32Imm : LoadAddressImm<"la", shamt,CPURegsOpnd>;
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// Arbitrary patterns that map to one or more instructions
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//===----------------------------------------------------------------------===//
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// Load/store pattern templates.
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class LoadRegImmPat<Instruction LoadInst, ValueType ValTy, PatFrag Node> :
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MipsPat<(ValTy (Node addrRegImm:$a)), (LoadInst addrRegImm:$a)>;
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class StoreRegImmPat<Instruction StoreInst, ValueType ValTy> :
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MipsPat<(store ValTy:$v, addrRegImm:$a), (StoreInst ValTy:$v, addrRegImm:$a)>;
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// Small immediates
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def : MipsPat<(i32 immSExt16:$in),
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(ADDiu ZERO, imm:$in)>;
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