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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118358 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2010-11-06 22:05:43 +00:00
parent 146018fc64
commit 17671510a7
1 changed files with 6 additions and 7 deletions
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13
lib/Target/X86/X86InstrInfo.td
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@ -1504,9 +1504,9 @@ def : InstAlias<"outl $port", (OUT32ir i8imm:$port)>;
// errors, since its encoding is the most compact.
def : InstAlias<"sldt $mem", (SLDT16m i16mem:$mem)>;
// "rc[lr] X" is an alias for "rcl X, 1"
/*
multiclass RotateAlias<string Mnemonic, string Opc> {
// "shl X, $1" is an alias for "shl X".
multiclass ShiftRotateByOneAlias<string Mnemonic, string Opc> {
def : InstAlias<!strconcat(Mnemonic, "b $op, $$1"),
(!cast<Instruction>(!strconcat(Opc, "8r1")) GR8:$op)>;
def : InstAlias<!strconcat(Mnemonic, "w $op, $$1"),
@ -1525,13 +1525,12 @@ multiclass RotateAlias<string Mnemonic, string Opc> {
(!cast<Instruction>(!strconcat(Opc, "64m1")) i64mem:$op)>;
}
defm : RotateAlias<"rcl", "RCL">;
defm : RotateAlias<"rcr", "RCR">;
defm : RotateAlias<"rol", "ROL">;
defm : RotateAlias<"ror", "ROR">;
defm : ShiftRotateByOneAlias<"rcl", "RCL">;
defm : ShiftRotateByOneAlias<"rcr", "RCR">;
defm : ShiftRotateByOneAlias<"rol", "ROL">;
defm : ShiftRotateByOneAlias<"ror", "ROR">;
*/
// test: We accept "testX <reg>, <mem>" and "testX <mem>, <reg>" as synonyms.
def : InstAlias<"testb $val, $mem", (TEST8rm GR8 :$val, i8mem :$mem)>;
def : InstAlias<"testw $val, $mem", (TEST16rm GR16:$val, i16mem:$mem)>;