From 177c1ef30d6f789e7e780651dae5cc0929d73066 Mon Sep 17 00:00:00 2001
From: Alexey Volkov <avolkov.intel@gmail.com>
Date: Fri, 7 Mar 2014 09:03:49 +0000
Subject: [PATCH] Enable FeatureFastUAMem for Silvermont processor

Differential Revision: http://llvm-reviews.chandlerc.com/D2982


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203218 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index ed6a78f02bc..78edcf04788 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -227,7 +227,7 @@ def : ProcessorModel<"slm",  SLMModel, [ProcIntelSLM,
                                FeaturePCLMUL, FeatureAES,
                                FeatureCallRegIndirect,
                                FeaturePRFCHW,
-                               FeatureSlowBTMem]>;
+                               FeatureSlowBTMem, FeatureFastUAMem]>;
 // "Arrandale" along with corei3 and corei5
 def : ProcessorModel<"corei7", SandyBridgeModel,
                      [FeatureSSE42, FeatureCMPXCHG16B, FeatureSlowBTMem,