From 17f2cf05b38fa0fcdfd97455ca191e4adf399d04 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 10 Oct 2005 06:00:30 +0000 Subject: [PATCH] Pull DAG ISel generation nodes out of the PowerPC backend to where they can be used by other targets. For those targets that want to use it, have at. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Target.td | 91 +------------ lib/Target/TargetSelectionDAG.td | 214 +++++++++++++++++++++++++++++++ 2 files changed, 216 insertions(+), 89 deletions(-) create mode 100644 lib/Target/TargetSelectionDAG.td diff --git a/lib/Target/Target.td b/lib/Target/Target.td index 6eae93a1b0c..4e362231237 100644 --- a/lib/Target/Target.td +++ b/lib/Target/Target.td @@ -241,94 +241,7 @@ class Target { list AssemblyWriters = [DefaultAsmWriter]; } - //===----------------------------------------------------------------------===// -// DAG node definitions used by the instruction selector. +// Pull in the common support for DAG isel generation // -// NOTE: all of this is a work-in-progress and should be ignored for now. -// -/* -class Expander result> { - dag Pattern = pattern; - list Result = result; -} - -class DagNodeValType; -def DNVT_any : DagNodeValType; // No constraint on tree node -def DNVT_void : DagNodeValType; // Tree node always returns void -def DNVT_val : DagNodeValType; // A non-void type -def DNVT_arg0 : DagNodeValType; // Tree node returns same type as Arg0 -def DNVT_arg1 : DagNodeValType; // Tree node returns same type as Arg1 -def DNVT_ptr : DagNodeValType; // The target pointer type -def DNVT_i8 : DagNodeValType; // Always have an i8 value - -class DagNode args> { - DagNodeValType RetType = ret; - list ArgTypes = args; - string EnumName = ?; -} - -// BuiltinDagNodes are built into the instruction selector and correspond to -// enum values. -class BuiltinDagNode Args, - string Ename> : DagNode { - let EnumName = Ename; -} - -// Magic nodes... -def Void : RegisterClass { let isDummyClass = 1; } -def set : DagNode; -def chain : BuiltinDagNode; -def blockchain : BuiltinDagNode; -def ChainExpander : Expander<(chain Void, Void), []>; -def BlockChainExpander : Expander<(blockchain Void, Void), []>; - - -// Terminals... -def imm : BuiltinDagNode; -def frameidx : BuiltinDagNode; -def basicblock : BuiltinDagNode; - -// Arithmetic... -def plus : BuiltinDagNode; -def minus : BuiltinDagNode; -def times : BuiltinDagNode; -def sdiv : BuiltinDagNode; -def udiv : BuiltinDagNode; -def srem : BuiltinDagNode; -def urem : BuiltinDagNode; -def and : BuiltinDagNode; -def or : BuiltinDagNode; -def xor : BuiltinDagNode; - -// Comparisons... -def seteq : BuiltinDagNode; -def setne : BuiltinDagNode; -def setlt : BuiltinDagNode; -def setle : BuiltinDagNode; -def setgt : BuiltinDagNode; -def setge : BuiltinDagNode; - -def load : BuiltinDagNode; -//def store : BuiltinDagNode; - -// Other... -def ret : BuiltinDagNode; -def retvoid : BuiltinDagNode; -def br : BuiltinDagNode; -def brcond : BuiltinDagNode; - -def unspec1 : BuiltinDagNode; -def unspec2 : BuiltinDagNode; - -//===----------------------------------------------------------------------===// -// DAG nonterminals definitions used by the instruction selector... -// -class Nonterminal { - dag Pattern = pattern; - bit BuiltIn = 0; -} - -*/ +include "../TargetSelectionDAG.td" diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td new file mode 100644 index 00000000000..ed63fcbd50d --- /dev/null +++ b/lib/Target/TargetSelectionDAG.td @@ -0,0 +1,214 @@ +//===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the target-independent interfaces used by SelectionDAG +// instruction selection generators. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Selection DAG Type Constraint definitions. +// +// Note that the semantics of these constraints are hard coded into tblgen. To +// modify or add constraints, you have to hack tblgen. +// + +class SDTypeConstraint { + int OperandNum = opnum; +} + +// SDTCisVT - The specified operand has exactly this VT. +class SDTCisVT : SDTypeConstraint { + ValueType VT = vt; +} + +// SDTCisInt - The specified operand is has integer type. +class SDTCisInt : SDTypeConstraint; + +// SDTCisFP - The specified operand is has floating point type. +class SDTCisFP : SDTypeConstraint; + +// SDTCisSameAs - The two specified operands have identical types. +class SDTCisSameAs : SDTypeConstraint { + int OtherOperandNum = OtherOp; +} + +// SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is +// smaller than the 'Other' operand. +class SDTCisVTSmallerThanOp : SDTypeConstraint { + int OtherOperandNum = OtherOp; +} + +//===----------------------------------------------------------------------===// +// Selection DAG Type Profile definitions. +// +// These use the constraints defined above to describe the type requirements of +// the various nodes. These are not hard coded into tblgen, allowing targets to +// add their own if needed. +// + +// SDTypeProfile - This profile describes the type requirements of a Selection +// DAG node. +class SDTypeProfile constraints> { + int NumResults = numresults; + int NumOperands = numoperands; + list Constraints = constraints; +} + +// Builtin profiles. +def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'. +def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt' +def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc. + SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0> +]>; +def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc. + SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0> +]>; +def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz + SDTCisSameAs<0, 1>, SDTCisInt<0> +]>; +def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc + SDTCisSameAs<0, 1>, SDTCisFP<0> +]>; +def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg + SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>, + SDTCisVTSmallerThanOp<2, 1> +]>; + +//===----------------------------------------------------------------------===// +// Selection DAG Node Properties. +// +// Note: These are hard coded into tblgen. +// +class SDNodeProperty; +def SDNPCommutative : SDNodeProperty; // X op Y == Y op X +def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z) + +//===----------------------------------------------------------------------===// +// Selection DAG Node definitions. +// +class SDNode props = [], string sdclass = "SDNode"> { + string Opcode = opcode; + string SDClass = sdclass; + list Properties = props; + SDTypeProfile TypeProfile = typeprof; +} + +def set; +def node; + +def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">; +def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">; +def add : SDNode<"ISD::ADD" , SDTIntBinOp , + [SDNPCommutative, SDNPAssociative]>; +def sub : SDNode<"ISD::SUB" , SDTIntBinOp>; +def mul : SDNode<"ISD::MUL" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>; +def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>; +def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>; +def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>; +def srem : SDNode<"ISD::SREM" , SDTIntBinOp>; +def urem : SDNode<"ISD::UREM" , SDTIntBinOp>; +def srl : SDNode<"ISD::SRL" , SDTIntBinOp>; +def sra : SDNode<"ISD::SRA" , SDTIntBinOp>; +def shl : SDNode<"ISD::SHL" , SDTIntBinOp>; +def and : SDNode<"ISD::AND" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def or : SDNode<"ISD::OR" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def xor : SDNode<"ISD::XOR" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>; +def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>; +def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>; +def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>; +def frem : SDNode<"ISD::FREM" , SDTFPBinOp>; +def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>; +def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>; +def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>; + +def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>; +def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>; + +//===----------------------------------------------------------------------===// +// Selection DAG Node Transformation Functions. +// +// This mechanism allows targets to manipulate nodes in the output DAG once a +// match has been formed. This is typically used to manipulate immediate +// values. +// +class SDNodeXForm { + SDNode Opcode = opc; + code XFormFunction = xformFunction; +} + +def NOOP_SDNodeXForm : SDNodeXForm; + + +//===----------------------------------------------------------------------===// +// Selection DAG Pattern Fragments. +// +// Pattern fragments are reusable chunks of dags that match specific things. +// They can take arguments and have C++ predicates that control whether they +// match. They are intended to make the patterns for common instructions more +// compact and readable. +// + +/// PatFrag - Represents a pattern fragment. This can match something on the +/// DAG, frame a single node to multiply nested other fragments. +/// +class PatFrag { + dag Operands = ops; + dag Fragment = frag; + code Predicate = pred; + SDNodeXForm OperandTransform = xform; +} + +// PatLeaf's are pattern fragments that have no operands. This is just a helper +// to define immediates and other common things concisely. +class PatLeaf + : PatFrag<(ops), frag, pred, xform>; + +// Leaf fragments. + +def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>; +def immZero : PatLeaf<(imm), [{ return N->isNullValue(); }]>; + +def vtInt : PatLeaf<(vt), [{ return MVT::isInteger(N->getVT()); }]>; +def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT()); }]>; + +// Other helper fragments. + +def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>; +def ineg : PatFrag<(ops node:$in), (sub immZero, node:$in)>; + +//===----------------------------------------------------------------------===// +// Selection DAG Pattern Support. +// +// Patterns are what are actually matched against the target-flavored +// instruction selection DAG. Instructions defined by the target implicitly +// define patterns in most cases, but patterns can also be explicitly added when +// an operation is defined by a sequence of instructions (e.g. loading a large +// immediate value on RISC targets that do not support immediates as large as +// their GPRs). +// + +class Pattern resultInstrs> { + dag PatternToMatch = patternToMatch; + list ResultInstrs = resultInstrs; +} + +// Pat - A simple (but common) form of a pattern, which produces a simple result +// not needing a full list. +class Pat : Pattern; +