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If all the bit positions are not specified; do not decode the instructions.

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We are bound to fail!  For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.

This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2010-04-09 21:01:02 +00:00
parent e3a39d40db
commit 1808e4d251
2 changed files with 15 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
utils/TableGen/ARMDecoderEmitter.cpp
View File

@ -1550,6 +1550,16 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
const StringRef Name = Def.getName(); const StringRef Name = Def.getName();
uint8_t Form = getByteField(Def, "Form"); uint8_t Form = getByteField(Def, "Form");
BitsInit &Bits = getBitsField(Def, "Inst");
// If all the bit positions are not specified; do not decode this instruction.
// We are bound to fail! For proper disassembly, the well-known encoding bits
// of the instruction must be fully specified.
//
// This also removes pseudo instructions from considerations of disassembly,
// which is a better design and less fragile than the name matchings.
if (Bits.allInComplete()) return false;
if (TN == TARGET_ARM) { if (TN == TARGET_ARM) {
// FIXME: what about Int_MemBarrierV6 and Int_SyncBarrierV6? // FIXME: what about Int_MemBarrierV6 and Int_SyncBarrierV6?
if ((Name != "Int_MemBarrierV7" && Name != "Int_SyncBarrierV7") && if ((Name != "Int_MemBarrierV7" && Name != "Int_SyncBarrierV7") &&
@ -1670,13 +1680,6 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
if (!thumbInstruction(Form)) if (!thumbInstruction(Form))
return false; return false;
// Ignore pseudo instructions.
if (Name == "tInt_eh_sjlj_setjmp" || Name == "t2Int_eh_sjlj_setjmp" ||
Name == "tInt_eh_sjlj_setjmp_nofp" ||
Name == "t2Int_eh_sjlj_setjmp_nofp" ||
Name == "t2MOVi32imm" || Name == "tBX" || Name == "tBXr9")
return false;
// On Darwin R9 is call-clobbered. Ignore the non-Darwin counterparts. // On Darwin R9 is call-clobbered. Ignore the non-Darwin counterparts.
if (Name == "tBL" || Name == "tBLXi" || Name == "tBLXr") if (Name == "tBL" || Name == "tBLXi" || Name == "tBLXr")
return false; return false;
@ -1741,8 +1744,6 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
} }
DEBUG({ DEBUG({
BitsInit &Bits = getBitsField(Def, "Inst");
errs() << " "; errs() << " ";
// Dumps the instruction encoding bits. // Dumps the instruction encoding bits.

5
utils/TableGen/Record.h
View File

@ -609,6 +609,11 @@ public:
if (!getBit(i)->isComplete()) return false; if (!getBit(i)->isComplete()) return false;
return true; return true;
} }
bool allInComplete() const {
for (unsigned i = 0; i != getNumBits(); ++i)
if (getBit(i)->isComplete()) return false;
return true;
}
virtual std::string getAsString() const; virtual std::string getAsString() const;
virtual Init *resolveReferences(Record &R, const RecordVal *RV); virtual Init *resolveReferences(Record &R, const RecordVal *RV);