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Some platforms use the same name for 32-bit and 64-bit registers (like
%r3 on PPC) in their ASM files. However, it's hard for humans to read during debugging. Adding a new field to the register data that lets you specify a different name to be printed than the one that goes into the ASM file -- %x3 instead of %r3, for instance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -49,6 +49,7 @@ class Type;
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///
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struct TargetRegisterDesc {
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const char *Name; // Assembly language name for the register
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const char *PrintableName;// Printable name for the reg (for debugging)
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const unsigned *AliasSet; // Register Alias Set, described above
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const unsigned *SubRegs; // Sub-register set, described above
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const unsigned *ImmSubRegs; // Immediate sub-register set, described above
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@ -381,6 +382,12 @@ public:
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return get(RegNo).Name;
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}
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/// getPrintableName - Return the human-readable symbolic target specific name
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/// for the specified physical register.
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const char *getPrintableName(unsigned RegNo) const {
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return get(RegNo).PrintableName;
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}
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/// getNumRegs - Return the number of registers this target has (useful for
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/// sizing arrays holding per register information)
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unsigned getNumRegs() const {
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@ -174,7 +174,7 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
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TM = &MF->getTarget();
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if (TM)
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OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
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OS << "%" << TM->getRegisterInfo()->get(getReg()).PrintableName;
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else
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OS << "%mreg" << getReg();
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}
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@ -1,4 +1,4 @@
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//===- PowerPCRegisterInfo.td - The PowerPC Register File --*- tablegen -*-===//
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//===- PPCRegisterInfo.td - The PowerPC Register File ------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -22,9 +22,10 @@ class GPR<bits<5> num, string n> : PPCReg<n> {
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}
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// GP8 - One of the 32 64-bit general-purpose registers
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class GP8<GPR SubReg> : PPCReg<SubReg.Name> {
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class GP8<GPR SubReg, string n> : PPCReg<SubReg.Name> {
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field bits<5> Num = SubReg.Num;
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let SubRegs = [SubReg];
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let PrintableName = n;
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}
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// SPR - One of the 32-bit special-purpose registers
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@ -88,38 +89,38 @@ def R30 : GPR<30, "r30">, DwarfRegNum<[30]>;
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def R31 : GPR<31, "r31">, DwarfRegNum<[31]>;
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// 64-bit General-purpose registers
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def X0 : GP8< R0>, DwarfRegNum<[0]>;
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def X1 : GP8< R1>, DwarfRegNum<[1]>;
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def X2 : GP8< R2>, DwarfRegNum<[2]>;
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def X3 : GP8< R3>, DwarfRegNum<[3]>;
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def X4 : GP8< R4>, DwarfRegNum<[4]>;
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def X5 : GP8< R5>, DwarfRegNum<[5]>;
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def X6 : GP8< R6>, DwarfRegNum<[6]>;
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def X7 : GP8< R7>, DwarfRegNum<[7]>;
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def X8 : GP8< R8>, DwarfRegNum<[8]>;
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def X9 : GP8< R9>, DwarfRegNum<[9]>;
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def X10 : GP8<R10>, DwarfRegNum<[10]>;
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def X11 : GP8<R11>, DwarfRegNum<[11]>;
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def X12 : GP8<R12>, DwarfRegNum<[12]>;
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def X13 : GP8<R13>, DwarfRegNum<[13]>;
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def X14 : GP8<R14>, DwarfRegNum<[14]>;
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def X15 : GP8<R15>, DwarfRegNum<[15]>;
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def X16 : GP8<R16>, DwarfRegNum<[16]>;
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def X17 : GP8<R17>, DwarfRegNum<[17]>;
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def X18 : GP8<R18>, DwarfRegNum<[18]>;
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def X19 : GP8<R19>, DwarfRegNum<[19]>;
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def X20 : GP8<R20>, DwarfRegNum<[20]>;
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def X21 : GP8<R21>, DwarfRegNum<[21]>;
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def X22 : GP8<R22>, DwarfRegNum<[22]>;
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def X23 : GP8<R23>, DwarfRegNum<[23]>;
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def X24 : GP8<R24>, DwarfRegNum<[24]>;
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def X25 : GP8<R25>, DwarfRegNum<[25]>;
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def X26 : GP8<R26>, DwarfRegNum<[26]>;
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def X27 : GP8<R27>, DwarfRegNum<[27]>;
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def X28 : GP8<R28>, DwarfRegNum<[28]>;
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def X29 : GP8<R29>, DwarfRegNum<[29]>;
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def X30 : GP8<R30>, DwarfRegNum<[30]>;
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def X31 : GP8<R31>, DwarfRegNum<[31]>;
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def X0 : GP8< R0, "x0">, DwarfRegNum<[0]>;
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def X1 : GP8< R1, "x1">, DwarfRegNum<[1]>;
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def X2 : GP8< R2, "x2">, DwarfRegNum<[2]>;
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def X3 : GP8< R3, "x3">, DwarfRegNum<[3]>;
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def X4 : GP8< R4, "x4">, DwarfRegNum<[4]>;
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def X5 : GP8< R5, "x5">, DwarfRegNum<[5]>;
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def X6 : GP8< R6, "x6">, DwarfRegNum<[6]>;
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def X7 : GP8< R7, "x7">, DwarfRegNum<[7]>;
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def X8 : GP8< R8, "x8">, DwarfRegNum<[8]>;
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def X9 : GP8< R9, "x9">, DwarfRegNum<[9]>;
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def X10 : GP8<R10, "x10">, DwarfRegNum<[10]>;
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def X11 : GP8<R11, "x11">, DwarfRegNum<[11]>;
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def X12 : GP8<R12, "x12">, DwarfRegNum<[12]>;
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def X13 : GP8<R13, "x13">, DwarfRegNum<[13]>;
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def X14 : GP8<R14, "x14">, DwarfRegNum<[14]>;
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def X15 : GP8<R15, "x15">, DwarfRegNum<[15]>;
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def X16 : GP8<R16, "x16">, DwarfRegNum<[16]>;
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def X17 : GP8<R17, "x17">, DwarfRegNum<[17]>;
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def X18 : GP8<R18, "x18">, DwarfRegNum<[18]>;
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def X19 : GP8<R19, "x19">, DwarfRegNum<[19]>;
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def X20 : GP8<R20, "x20">, DwarfRegNum<[20]>;
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def X21 : GP8<R21, "x21">, DwarfRegNum<[21]>;
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def X22 : GP8<R22, "x22">, DwarfRegNum<[22]>;
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def X23 : GP8<R23, "x23">, DwarfRegNum<[23]>;
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def X24 : GP8<R24, "x24">, DwarfRegNum<[24]>;
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def X25 : GP8<R25, "x25">, DwarfRegNum<[25]>;
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def X26 : GP8<R26, "x26">, DwarfRegNum<[26]>;
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def X27 : GP8<R27, "x27">, DwarfRegNum<[27]>;
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def X28 : GP8<R28, "x28">, DwarfRegNum<[28]>;
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def X29 : GP8<R29, "x29">, DwarfRegNum<[29]>;
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def X30 : GP8<R30, "x30">, DwarfRegNum<[30]>;
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def X31 : GP8<R31, "x31">, DwarfRegNum<[31]>;
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// Floating-point registers
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def F0 : FPR< 0, "f0">, DwarfRegNum<[32]>;
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@ -26,6 +26,7 @@ class RegisterClass; // Forward def
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class Register<string n> {
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string Namespace = "";
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string Name = n;
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string PrintableName = n;
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// SpillSize - If this value is set to a non-zero value, it is the size in
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// bits of the spill slot required to hold this register. If this value is
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@ -512,7 +512,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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}
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OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
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OS << " { \"NOREG\",\t0,\t0,\t0,\t0 },\n";
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OS << " { \"NOREG\",\t\"NOREG\",\t0,\t0,\t0,\t0 },\n";
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// Now that register alias and sub-registers sets have been emitted, emit the
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// register descriptors now.
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@ -524,6 +524,16 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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OS << Reg.TheDef->getValueAsString("Name");
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else
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OS << Reg.getName();
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OS << "\",\t\"";
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if (!Reg.TheDef->getValueAsString("PrintableName").empty()) {
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OS << Reg.TheDef->getValueAsString("PrintableName");
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} else {
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// Default to "name".
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if (!Reg.TheDef->getValueAsString("Name").empty())
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OS << Reg.TheDef->getValueAsString("Name");
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else
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OS << Reg.getName();
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}
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OS << "\",\t";
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if (RegisterAliases.count(Reg.TheDef))
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OS << Reg.getName() << "_AliasSet,\t";
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