Stop using MCSectionData in MCMachObjectWriter.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2015-05-26 01:15:30 +00:00
parent 5c84463094
commit 1826cd69f3
6 changed files with 45 additions and 61 deletions

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@ -21,7 +21,6 @@
namespace llvm {
class MCSectionData;
class MachObjectWriter;
class MCMachObjectTargetWriter {
@ -102,8 +101,8 @@ class MachObjectWriter : public MCObjectWriter {
: Sym(Sym), MRE(MRE) {}
};
llvm::DenseMap<const MCSectionData *, std::vector<RelAndSymbol>> Relocations;
llvm::DenseMap<const MCSectionData*, unsigned> IndirectSymBase;
llvm::DenseMap<const MCSection *, std::vector<RelAndSymbol>> Relocations;
llvm::DenseMap<const MCSection *, unsigned> IndirectSymBase;
/// @}
/// \name Symbol Table Data
@ -149,8 +148,7 @@ public:
uint64_t getFragmentAddress(const MCFragment *Fragment,
const MCAsmLayout &Layout) const;
uint64_t getPaddingSize(const MCSectionData *SD,
const MCAsmLayout &Layout) const;
uint64_t getPaddingSize(const MCSection *SD, const MCAsmLayout &Layout) const;
bool doesSymbolRequireExternRelocation(const MCSymbol &S);
@ -180,7 +178,7 @@ public:
uint64_t SectionDataSize);
void WriteSection(const MCAssembler &Asm, const MCAsmLayout &Layout,
const MCSectionData &SD, uint64_t FileOffset,
const MCSection &Sec, uint64_t FileOffset,
uint64_t RelocationsStart, unsigned NumRelocations);
void WriteSymtabLoadCommand(uint32_t SymbolOffset, uint32_t NumSymbols,
@ -222,10 +220,10 @@ public:
// to a symbol it should be passed as \p RelSymbol so that it can be updated
// afterwards. If the relocation doesn't refer to a symbol, nullptr should be
// used.
void addRelocation(const MCSymbol *RelSymbol, const MCSectionData *SD,
void addRelocation(const MCSymbol *RelSymbol, const MCSection *Sec,
MachO::any_relocation_info &MRE) {
RelAndSymbol P(RelSymbol, MRE);
Relocations[SD].push_back(P);
Relocations[Sec].push_back(P);
}
void RecordScatteredRelocation(const MCAssembler &Asm,

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@ -105,11 +105,11 @@ uint64_t MachObjectWriter::getSymbolAddress(const MCSymbol &S,
Layout.getSymbolOffset(S);
}
uint64_t MachObjectWriter::getPaddingSize(const MCSectionData *SD,
uint64_t MachObjectWriter::getPaddingSize(const MCSection *Sec,
const MCAsmLayout &Layout) const {
uint64_t EndAddr =
getSectionAddress(&SD->getSection()) + Layout.getSectionAddressSize(SD);
unsigned Next = SD->getSection().getLayoutOrder() + 1;
uint64_t EndAddr = getSectionAddress(Sec) +
Layout.getSectionAddressSize(&Sec->getSectionData());
unsigned Next = Sec->getLayoutOrder() + 1;
if (Next >= Layout.getSectionOrder().size())
return 0;
@ -195,12 +195,12 @@ void MachObjectWriter::WriteSegmentLoadCommand(unsigned NumSections,
void MachObjectWriter::WriteSection(const MCAssembler &Asm,
const MCAsmLayout &Layout,
const MCSectionData &SD,
uint64_t FileOffset,
const MCSection &Sec, uint64_t FileOffset,
uint64_t RelocationsStart,
unsigned NumRelocations) {
const MCSectionData &SD = Sec.getSectionData();
uint64_t SectionSize = Layout.getSectionAddressSize(&SD);
const MCSectionMachO &Section = cast<MCSectionMachO>(SD.getSection());
const MCSectionMachO &Section = cast<MCSectionMachO>(Sec);
// The offset is unused for virtual sections.
if (Section.isVirtualSection()) {
@ -234,7 +234,7 @@ void MachObjectWriter::WriteSection(const MCAssembler &Asm,
Write32(NumRelocations ? RelocationsStart : 0);
Write32(NumRelocations);
Write32(Flags);
Write32(IndirectSymBase.lookup(&SD)); // reserved1
Write32(IndirectSymBase.lookup(&SD.getSection())); // reserved1
Write32(Section.getStubSize()); // reserved2
if (is64Bit())
Write32(0); // reserved3
@ -502,7 +502,8 @@ void MachObjectWriter::BindIndirectSymbols(MCAssembler &Asm) {
continue;
// Initialize the section indirect symbol base, if necessary.
IndirectSymBase.insert(std::make_pair(it->SectionData, IndirectIndex));
IndirectSymBase.insert(
std::make_pair(&it->SectionData->getSection(), IndirectIndex));
Asm.getOrCreateSymbolData(*it->Symbol);
}
@ -519,7 +520,8 @@ void MachObjectWriter::BindIndirectSymbols(MCAssembler &Asm) {
continue;
// Initialize the section indirect symbol base, if necessary.
IndirectSymBase.insert(std::make_pair(it->SectionData, IndirectIndex));
IndirectSymBase.insert(
std::make_pair(&it->SectionData->getSection(), IndirectIndex));
// Set the symbol type to undefined lazy, but only on construction.
//
@ -624,8 +626,7 @@ void MachObjectWriter::ComputeSymbolTable(
UndefinedSymbolData[i].Symbol->setIndex(Index++);
for (const MCSection &Section : Asm) {
const MCSectionData &SD = Section.getSectionData();
std::vector<RelAndSymbol> &Relocs = Relocations[&SD];
std::vector<RelAndSymbol> &Relocs = Relocations[&Section];
for (RelAndSymbol &Rel : Relocs) {
if (!Rel.Sym)
continue;
@ -655,7 +656,7 @@ void MachObjectWriter::computeSectionAddresses(const MCAssembler &Asm,
// Explicitly pad the section to match the alignment requirements of the
// following one. This is for 'gas' compatibility, it shouldn't
/// strictly be necessary.
StartAddress += getPaddingSize(SD, Layout);
StartAddress += getPaddingSize(&SD->getSection(), Layout);
}
}
@ -807,7 +808,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
uint64_t Address = getSectionAddress(&*it);
uint64_t Size = Layout.getSectionAddressSize(&SD);
uint64_t FileSize = Layout.getSectionFileSize(&SD);
FileSize += getPaddingSize(&SD, Layout);
FileSize += getPaddingSize(&*it, Layout);
VMSize = std::max(VMSize, Address + Size);
@ -834,11 +835,10 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
for (MCAssembler::const_iterator it = Asm.begin(),
ie = Asm.end(); it != ie; ++it) {
const MCSectionData &SD = it->getSectionData();
std::vector<RelAndSymbol> &Relocs = Relocations[&SD];
std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
unsigned NumRelocs = Relocs.size();
uint64_t SectionStart = SectionDataStart + getSectionAddress(&*it);
WriteSection(Asm, Layout, SD, SectionStart, RelocTableEnd, NumRelocs);
WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
RelocTableEnd += NumRelocs * sizeof(MachO::any_relocation_info);
}
@ -917,7 +917,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
const MCSectionData &SD = it->getSectionData();
Asm.writeSectionData(&SD, Layout);
uint64_t Pad = getPaddingSize(&SD, Layout);
uint64_t Pad = getPaddingSize(&*it, Layout);
WriteZeros(Pad);
}
@ -929,7 +929,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
ie = Asm.end(); it != ie; ++it) {
// Write the section relocation entries, in reverse order to match 'as'
// (approximately, the exact algorithm is more complicated than this).
std::vector<RelAndSymbol> &Relocs = Relocations[&it->getSectionData()];
std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
Write32(Relocs[e - i - 1].MRE.r_word0);
Write32(Relocs[e - i - 1].MRE.r_word1);

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@ -229,8 +229,7 @@ void AArch64MachObjectWriter::RecordRelocation(
MachO::any_relocation_info MRE;
MRE.r_word0 = FixupOffset;
MRE.r_word1 = (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(A_Base, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
return;
} else if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
@ -279,8 +278,7 @@ void AArch64MachObjectWriter::RecordRelocation(
MachO::any_relocation_info MRE;
MRE.r_word0 = FixupOffset;
MRE.r_word1 = (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(A_Base, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
RelSymbol = B_Base;
Type = MachO::ARM64_RELOC_SUBTRACTOR;
@ -387,8 +385,7 @@ void AArch64MachObjectWriter::RecordRelocation(
MRE.r_word0 = FixupOffset;
MRE.r_word1 =
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
// Now set up the Addend relocation.
Type = MachO::ARM64_RELOC_ADDEND;
@ -409,8 +406,7 @@ void AArch64MachObjectWriter::RecordRelocation(
MRE.r_word0 = FixupOffset;
MRE.r_word1 =
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createAArch64MachObjectWriter(raw_pwrite_stream &OS,

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@ -227,8 +227,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value2;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
}
MachO::any_relocation_info MRE;
@ -239,7 +238,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(), MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
}
void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
@ -294,8 +293,7 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value2;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
}
MachO::any_relocation_info MRE;
@ -305,7 +303,7 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(), MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
}
bool ARMMachObjectWriter::requiresExternRelocation(MachObjectWriter *Writer,
@ -466,12 +464,10 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
(Log2Size << 25) |
(MachO::ARM_RELOC_PAIR << 28));
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(),
MREPair);
Writer->addRelocation(nullptr, Fragment->getParent(), MREPair);
}
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createARMMachObjectWriter(raw_pwrite_stream &OS,

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@ -282,8 +282,7 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
MachO::any_relocation_info MRE;
makeScatteredRelocationInfo(MRE, other_half, MachO::GENERIC_RELOC_PAIR,
Log2Size, IsPCRel, Value2);
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
} else {
// If the offset is more than 24-bits, it won't fit in a scattered
// relocation offset field, so we fall back to using a non-scattered
@ -297,7 +296,7 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
}
MachO::any_relocation_info MRE;
makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(), MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
return true;
}
@ -375,8 +374,7 @@ void PPCMachObjectWriter::RecordPPCRelocation(
// struct relocation_info (8 bytes)
MachO::any_relocation_info MRE;
makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, false, Type);
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createPPCMachObjectWriter(raw_pwrite_stream &OS,

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@ -197,8 +197,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(
MRE.r_word0 = FixupOffset;
MRE.r_word1 =
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(A_Base, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
if (B_Base)
RelSymbol = B_Base;
@ -337,8 +336,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(
MRE.r_word0 = FixupOffset;
MRE.r_word1 = (Index << 0) | (IsPCRel << 24) | (Log2Size << 25) |
(IsExtern << 27) | (Type << 28);
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
@ -411,8 +409,7 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value2;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
} else {
// If the offset is more than 24-bits, it won't fit in a scattered
// relocation offset field, so we fall back to using a non-scattered
@ -434,7 +431,7 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
(IsPCRel << 30) |
MachO::R_SCATTERED);
MRE.r_word1 = Value;
Writer->addRelocation(nullptr, &Fragment->getParent()->getSectionData(), MRE);
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
return true;
}
@ -476,8 +473,8 @@ void X86MachObjectWriter::RecordTLVPRelocation(MachObjectWriter *Writer,
MRE.r_word0 = Value;
MRE.r_word1 =
(IsPCRel << 24) | (Log2Size << 25) | (MachO::GENERIC_RELOC_TLV << 28);
Writer->addRelocation(&Target.getSymA()->getSymbol(),
&Fragment->getParent()->getSectionData(), MRE);
Writer->addRelocation(&Target.getSymA()->getSymbol(), Fragment->getParent(),
MRE);
}
void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
@ -573,8 +570,7 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
MRE.r_word0 = FixupOffset;
MRE.r_word1 =
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
Writer->addRelocation(RelSymbol, &Fragment->getParent()->getSectionData(),
MRE);
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createX86MachObjectWriter(raw_pwrite_stream &OS,