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Make register Mips::RA allocatable if not in mips16 mode.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159971 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2012-07-10 00:19:06 +00:00
parent 655b5a48b9
commit 182ef6fcaa
10 changed files with 378 additions and 39 deletions
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13
lib/Target/Mips/MipsInstrInfo.cpp
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@ -233,6 +233,13 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
.addMemOperand(MMO);
}
void MipsInstrInfo::ExpandRetRA(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned Opc) const {
BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(Opc))
.addReg(Mips::RA);
}
void MipsInstrInfo::ExpandExtractElementF64(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
const TargetInstrInfo *TII = TM.getInstrInfo();
@ -272,6 +279,12 @@ bool MipsInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
switch(MI->getDesc().getOpcode()) {
default:
return false;
case Mips::RetRA:
ExpandRetRA(MBB, MI, Mips::RET);
break;
case Mips::RetRA16:
ExpandRetRA(MBB, MI, Mips::RET16);
break;
case Mips::BuildPairF64:
ExpandBuildPairF64(MBB, MI);
break;