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[mips] Rename register classes CPURegs and CPU64Regs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2013-08-06 23:08:38 +00:00
parent 3492eefa4b
commit 1858786285
22 changed files with 620 additions and 620 deletions
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6
lib/Target/Mips/MipsMachineFunction.cpp
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@ -38,8 +38,8 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() {
RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
else
RC = ST.isABI_N64() ?
(const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
(const TargetRegisterClass*)&Mips::CPURegsRegClass;
(const TargetRegisterClass*)&Mips::GPR64RegClass :
(const TargetRegisterClass*)&Mips::GPR32RegClass;
return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
}
@ -60,7 +60,7 @@ void MipsFunctionInfo::createEhDataRegsFI() {
for (int I = 0; I < 4; ++I) {
const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
const TargetRegisterClass *RC = ST.isABI_N64() ?
&Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass;
&Mips::GPR64RegClass : &Mips::GPR32RegClass;
EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
RC->getAlignment(), false);