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[PowerPC] Add asm support for cache-inhibited ld/st instructions
Add assembler support for the fixed-point cache-inhibited load/store instructions. These are hypervisor-level only, so don't get too excited ;) Fixes PR21650. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222976 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -3234,6 +3234,24 @@ def MTDCR : XFXForm_1<31, 451, (outs), (ins gprc:$RT, i32imm:$SPR),
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def ATTN : XForm_attn<0, 256, (outs), (ins), "attn", IIC_BrB>;
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def LBZCIX : XForm_base_r3xo<31, 853, (outs gprc:$RST), (ins gprc:$A, gprc:$B),
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"lbzcix $RST, $A, $B", IIC_LdStLoad, []>;
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def LHZCIX : XForm_base_r3xo<31, 821, (outs gprc:$RST), (ins gprc:$A, gprc:$B),
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"lhzcix $RST, $A, $B", IIC_LdStLoad, []>;
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def LWZCIX : XForm_base_r3xo<31, 789, (outs gprc:$RST), (ins gprc:$A, gprc:$B),
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"lwzcix $RST, $A, $B", IIC_LdStLoad, []>;
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def LDCIX : XForm_base_r3xo<31, 885, (outs gprc:$RST), (ins gprc:$A, gprc:$B),
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"ldcix $RST, $A, $B", IIC_LdStLoad, []>;
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def STBCIX : XForm_base_r3xo<31, 981, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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"stbcix $RST, $A, $B", IIC_LdStLoad, []>;
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def STHCIX : XForm_base_r3xo<31, 949, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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"sthcix $RST, $A, $B", IIC_LdStLoad, []>;
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def STWCIX : XForm_base_r3xo<31, 917, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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"stwcix $RST, $A, $B", IIC_LdStLoad, []>;
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def STDCIX : XForm_base_r3xo<31, 1013, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
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"stdcix $RST, $A, $B", IIC_LdStLoad, []>;
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//===----------------------------------------------------------------------===//
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// PowerPC Assembler Instruction Aliases
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//
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