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Don't feed 19 bit immediates to ILA.
Patch (slightly modified) by Visa Putkinen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122052 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -143,7 +143,7 @@ def immU16 : PatLeaf<(imm), [{
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def imm18 : PatLeaf<(imm), [{
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// imm18 predicate: True if the immediate fits into an 18-bit unsigned field.
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int Value = (int) N->getZExtValue();
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return ((Value & ((1 << 19) - 1)) == Value);
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return isUInt<18>(Value);
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}]>;
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def lo16 : PatLeaf<(imm), [{
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@ -203,7 +203,7 @@ def FPimm_sext16 : SDNodeXForm<fpimm, [{
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def FPimm_u18 : SDNodeXForm<fpimm, [{
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float fval = N->getValueAPF().convertToFloat();
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return getI32Imm(FloatToBits(fval) & ((1 << 19) - 1));
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return getI32Imm(FloatToBits(fval) & ((1 << 18) - 1));
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}]>;
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def fpimmSExt16 : PatLeaf<(fpimm), [{
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@ -225,7 +225,7 @@ def hi16_f32 : PatLeaf<(fpimm), [{
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def fpimm18 : PatLeaf<(fpimm), [{
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if (N->getValueType(0) == MVT::f32) {
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uint32_t Value = FloatToBits(N->getValueAPF().convertToFloat());
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return ((Value & ((1 << 19) - 1)) == Value);
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return isUInt<18>(Value);
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}
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return false;
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@ -1,6 +1,6 @@
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; RUN: llc < %s -march=cellspu > %t1.s
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; RUN: grep ilhu %t1.s | count 8
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; RUN: grep iohl %t1.s | count 6
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; RUN: grep ilhu %t1.s | count 9
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; RUN: grep iohl %t1.s | count 7
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; RUN: grep -w il %t1.s | count 3
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; RUN: grep 16429 %t1.s | count 1
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; RUN: grep 63572 %t1.s | count 1
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@ -12,6 +12,7 @@
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; RUN: grep 49077 %t1.s | count 1
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; RUN: grep 1267 %t1.s | count 2
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; RUN: grep 16309 %t1.s | count 1
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; RUN: cat %t1.s | FileCheck %s
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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@ -31,6 +32,16 @@ define i32 @test_4() {
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ret i32 -512 ;; IL via pattern
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}
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define i32 @test_5()
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{
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;CHECK: test_5:
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;CHECK-NOT: ila $3, 40000
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;CHECK: ilhu
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;CHECK: iohl
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;CHECK: bi $lr
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ret i32 400000
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}
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;; double float floatval
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;; 0x4005bf0a80000000 0x402d|f854 2.718282
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define float @float_const_1() {
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