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Layout proper frame for ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32436 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -84,9 +84,14 @@ asm(
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// FIXME: need to save v[0-19] for altivec?
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// FIXME: could shrink frame
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// Set up a proper stack frame
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"stwu r1, -208(r1)\n"
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// FIXME Layout
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// PowerPC64 ABI linkage - 24 bytes
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// parameters - 32 bytes
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// 13 double registers - 104 bytes
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// 8 int registers - 32 bytes
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"mflr r0\n"
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"stw r0, 216(r1)\n"
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"stw r0, 8(r1)\n"
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"stwu r1, -208(r1)\n"
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// Save all int arg registers
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"stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
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"stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
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@ -146,47 +151,52 @@ asm(
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// Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
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// FIXME: need to save v[0-19] for altivec?
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// Set up a proper stack frame
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"stdu r1, -208(r1)\n"
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// Layout
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// PowerPC64 ABI linkage - 48 bytes
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// parameters - 64 bytes
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// 13 double registers - 104 bytes
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// 8 int registers - 64 bytes
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"mflr r0\n"
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"std r0, 224(r1)\n"
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"std r0, 16(r1)\n"
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"stdu r1, -280(r1)\n"
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// Save all int arg registers
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"std r10, 200(r1)\n" "std r9, 192(r1)\n"
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"std r8, 184(r1)\n" "std r7, 176(r1)\n"
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"std r6, 168(r1)\n" "std r5, 160(r1)\n"
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"std r4, 152(r1)\n" "std r3, 144(r1)\n"
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"std r10, 272(r1)\n" "std r9, 264(r1)\n"
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"std r8, 256(r1)\n" "std r7, 248(r1)\n"
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"std r6, 240(r1)\n" "std r5, 232(r1)\n"
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"std r4, 224(r1)\n" "std r3, 216(r1)\n"
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// Save all call-clobbered FP regs.
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"stfd f13, 136(r1)\n" "stfd f12, 128(r1)\n"
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"stfd f11, 120(r1)\n" "stfd f10, 112(r1)\n"
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"stfd f9, 104(r1)\n" "stfd f8, 96(r1)\n"
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"stfd f7, 88(r1)\n" "stfd f6, 80(r1)\n"
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"stfd f5, 72(r1)\n" "stfd f4, 64(r1)\n"
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"stfd f3, 56(r1)\n" "stfd f2, 48(r1)\n"
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"stfd f1, 40(r1)\n"
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"stfd f13, 208(r1)\n" "stfd f12, 200(r1)\n"
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"stfd f11, 192(r1)\n" "stfd f10, 184(r1)\n"
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"stfd f9, 176(r1)\n" "stfd f8, 168(r1)\n"
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"stfd f7, 160(r1)\n" "stfd f6, 152(r1)\n"
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"stfd f5, 144(r1)\n" "stfd f4, 136(r1)\n"
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"stfd f3, 128(r1)\n" "stfd f2, 120(r1)\n"
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"stfd f1, 112(r1)\n"
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// Arguments to Compilation Callback:
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// r3 - our lr (address of the call instruction in stub plus 4)
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// r4 - stub's lr (address of instruction that called the stub plus 4)
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// r5 - is64Bit - always 1.
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"mr r3, r0\n"
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"ld r2, 208(r1)\n" // stub's frame
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"ld r2, 280(r1)\n" // stub's frame
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"ld r4, 16(r2)\n" // stub's lr
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"li r5, 1\n" // 1 == 64 bit
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"bl _PPCCompilationCallbackC\n"
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"mtctr r3\n"
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// Restore all int arg registers
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"ld r10, 200(r1)\n" "ld r9, 192(r1)\n"
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"ld r8, 184(r1)\n" "ld r7, 176(r1)\n"
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"ld r6, 168(r1)\n" "ld r5, 160(r1)\n"
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"ld r4, 152(r1)\n" "ld r3, 144(r1)\n"
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"ld r10, 272(r1)\n" "ld r9, 264(r1)\n"
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"ld r8, 256(r1)\n" "ld r7, 248(r1)\n"
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"ld r6, 240(r1)\n" "ld r5, 232(r1)\n"
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"ld r4, 224(r1)\n" "ld r3, 216(r1)\n"
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// Restore all FP arg registers
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"lfd f13, 136(r1)\n" "lfd f12, 128(r1)\n"
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"lfd f11, 120(r1)\n" "lfd f10, 112(r1)\n"
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"lfd f9, 104(r1)\n" "lfd f8, 96(r1)\n"
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"lfd f7, 88(r1)\n" "lfd f6, 80(r1)\n"
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"lfd f5, 72(r1)\n" "lfd f4, 64(r1)\n"
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"lfd f3, 56(r1)\n" "lfd f2, 48(r1)\n"
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"lfd f1, 40(r1)\n"
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"lfd f13, 208(r1)\n" "lfd f12, 200(r1)\n"
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"lfd f11, 192(r1)\n" "lfd f10, 184(r1)\n"
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"lfd f9, 176(r1)\n" "lfd f8, 168(r1)\n"
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"lfd f7, 160(r1)\n" "lfd f6, 152(r1)\n"
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"lfd f5, 144(r1)\n" "lfd f4, 136(r1)\n"
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"lfd f3, 128(r1)\n" "lfd f2, 120(r1)\n"
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"lfd f1, 112(r1)\n"
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// Pop 3 frames off the stack and branch to target
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"ld r1, 208(r1)\n"
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"ld r1, 280(r1)\n"
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"ld r2, 16(r1)\n"
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"mtlr r2\n"
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"bctr\n"
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