From 18fc3275c1ced483ca345c4912141e1ab3ed1920 Mon Sep 17 00:00:00 2001 From: Tilmann Scheller Date: Fri, 16 May 2014 16:50:13 +0000 Subject: [PATCH] [ARM64] Fix wrong comment in load/store optimization pass. ldr x1, [x0, #64] add x0, x0, #64 -> ldr x1, [x0], #64 is not a valid transformation, the correct transformation (and what the code actually does) is: ldr x1, [x0, #64] add x0, x0, #64 -> ldr x1, [x0, #64]! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208998 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp b/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp index 40b39126fad..9a8e1c3d91c 100644 --- a/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp +++ b/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp @@ -892,7 +892,7 @@ bool ARM64LoadStoreOpt::optimizeBlock(MachineBasicBlock &MBB) { // ldr x1, [x0, #64] // add x0, x0, #64 // merged into: - // ldr x1, [x0], #64 + // ldr x1, [x0, #64]! // The immediate in the load/store is scaled by the size of the register // being loaded. The immediate in the add we're looking for,