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Completely rearchitect the interface between targets and the pass manager.

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This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-09-04 04:14:57 +00:00
parent dd842e12e1
commit 1911fd4f85
26 changed files with 400 additions and 636 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/Target/ARM/ARMTargetMachine.cpp
+6 -50
View File
@@ -14,15 +14,9 @@
#include "ARMTargetMachine.h"
#include "ARMFrameInfo.h"
#include "ARM.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Transforms/Scalar.h"
#include <iostream>
using namespace llvm;
namespace {
@@ -47,54 +41,16 @@ unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
return 0;
}
/// addPassesToEmitFile - Add passes to the specified pass manager
/// to implement a static compiler for this target.
///
bool ARMTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
CodeGenFileType FileType,
bool Fast) {
if (FileType != TargetMachine::AssemblyFile)
return true;
// Run loop strength reduction before anything else.
if (!Fast)
PM.add(createLoopStrengthReducePass());
if (!Fast)
PM.add(createCFGSimplificationPass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
// FIXME: implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// Print LLVM code input to instruction selector:
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Pass Pipeline Configuration
bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
PM.add(createARMISelDag(*this));
// Print machine instructions as they were initially generated.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
// Print machine instructions after register allocation and prolog/epilog
// insertion.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
return false;
}
bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
std::ostream &Out) {
// Output assembly language.
PM.add(createARMCodePrinterPass(Out, *this));
// Delete the MachineInstrs we generated, since they're no longer needed.
PM.add(createMachineCodeDeleter());
return false;
}