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Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment

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for the port.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134085 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-29 19:12:24 +00:00
parent 314aff1474
commit 193f7e2eb0
2 changed files with 7 additions and 33 deletions
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36
lib/Target/MBlaze/MBlazeISelLowering.cpp
View File

@ -1114,15 +1114,19 @@ MBlazeTargetLowering::getSingleConstraintMatchWeight(
return weight;
}
/// getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"),
/// return a list of registers that can be used to satisfy the constraint.
/// This should only be used for C_RegisterClass constraints.
/// Given a register class constraint, like 'r', if this corresponds directly
/// to an LLVM register class, return a register of 0 and the register class
/// pointer.
std::pair<unsigned, const TargetRegisterClass*> MBlazeTargetLowering::
getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
if (Constraint.size() == 1) {
switch (Constraint[0]) {
case 'r':
return std::make_pair(0U, MBlaze::GPRRegisterClass);
// TODO: These can't possibly be right, but match what was in
// getRegClassForInlineAsmConstraint.
case 'd':
case 'y':
case 'f':
if (VT == MVT::f32)
return std::make_pair(0U, MBlaze::GPRRegisterClass);
@ -1131,32 +1135,6 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
}
/// Given a register class constraint, like 'r', if this corresponds directly
/// to an LLVM register class, return a register of 0 and the register class
/// pointer.
std::vector<unsigned> MBlazeTargetLowering::
getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const {
if (Constraint.size() != 1)
return std::vector<unsigned>();
switch (Constraint[0]) {
default : break;
case 'r':
// GCC MBlaze Constraint Letters
case 'd':
case 'y':
case 'f':
return make_vector<unsigned>(
MBlaze::R3, MBlaze::R4, MBlaze::R5, MBlaze::R6,
MBlaze::R7, MBlaze::R9, MBlaze::R10, MBlaze::R11,
MBlaze::R12, MBlaze::R19, MBlaze::R20, MBlaze::R21,
MBlaze::R22, MBlaze::R23, MBlaze::R24, MBlaze::R25,
MBlaze::R26, MBlaze::R27, MBlaze::R28, MBlaze::R29,
MBlaze::R30, MBlaze::R31, 0);
}
return std::vector<unsigned>();
}
bool MBlazeTargetLowering::
isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
// The MBlaze target isn't yet aware of offsets.

4
lib/Target/MBlaze/MBlazeISelLowering.h
View File

@ -173,10 +173,6 @@ namespace llvm {
getRegForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const;
std::vector<unsigned>
getRegClassForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const;
virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
/// isFPImmLegal - Returns true if the target can instruction select the