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MCCodeEmitter/X86: Handle tied registers better when converting MCInst ->

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MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95136 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar
2010-02-02 21:44:10 +00:00
parent e1ec617c6a
commit 1945e179e1
1 changed files with 18 additions and 6 deletions
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24
lib/Target/X86/X86CodeEmitter.cpp
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@@ -1002,10 +1002,10 @@ public:
unsigned Opcode = MI.getOpcode(); unsigned Opcode = MI.getOpcode();
unsigned NumOps = MI.getNumOperands(); unsigned NumOps = MI.getNumOperands();
unsigned CurOp = 0; unsigned CurOp = 0;
if (NumOps > 1 && Desc.getOperandConstraint(1, TOI::TIED_TO) != -1) { bool AddTied = false;
Instr->addOperand(MachineOperand::CreateReg(0, false)); if (NumOps > 1 && Desc.getOperandConstraint(1, TOI::TIED_TO) != -1)
++CurOp; AddTied = true;
} else if (NumOps > 2 && else if (NumOps > 2 &&
Desc.getOperandConstraint(NumOps-1, TOI::TIED_TO)== 0) Desc.getOperandConstraint(NumOps-1, TOI::TIED_TO)== 0)
// Skip the last source operand that is tied_to the dest reg. e.g. LXADD32 // Skip the last source operand that is tied_to the dest reg. e.g. LXADD32
--NumOps; --NumOps;
@@ -1016,7 +1016,9 @@ public:
case X86II::MRMSrcReg: case X86II::MRMSrcReg:
// Matching doesn't fill this in completely, we have to choose operand 0 // Matching doesn't fill this in completely, we have to choose operand 0
// for a tied register. // for a tied register.
OK &= AddRegToInstr(MI, Instr, 0); CurOp++; OK &= AddRegToInstr(MI, Instr, CurOp++);
if (AddTied)
OK &= AddRegToInstr(MI, Instr, CurOp++ - 1);
OK &= AddRegToInstr(MI, Instr, CurOp++); OK &= AddRegToInstr(MI, Instr, CurOp++);
if (CurOp < NumOps) if (CurOp < NumOps)
OK &= AddImmToInstr(MI, Instr, CurOp); OK &= AddImmToInstr(MI, Instr, CurOp);
@@ -1035,7 +1037,11 @@ public:
break; break;
case X86II::AddRegFrm: case X86II::AddRegFrm:
// Matching doesn't fill this in completely, we have to choose operand 0
// for a tied register.
OK &= AddRegToInstr(MI, Instr, CurOp++); OK &= AddRegToInstr(MI, Instr, CurOp++);
if (AddTied)
OK &= AddRegToInstr(MI, Instr, CurOp++ - 1);
if (CurOp < NumOps) if (CurOp < NumOps)
OK &= AddImmToInstr(MI, Instr, CurOp); OK &= AddImmToInstr(MI, Instr, CurOp);
break; break;
@@ -1046,7 +1052,9 @@ public:
case X86II::MRM6r: case X86II::MRM7r: case X86II::MRM6r: case X86II::MRM7r:
// Matching doesn't fill this in completely, we have to choose operand 0 // Matching doesn't fill this in completely, we have to choose operand 0
// for a tied register. // for a tied register.
OK &= AddRegToInstr(MI, Instr, 0); CurOp++; OK &= AddRegToInstr(MI, Instr, CurOp++);
if (AddTied)
OK &= AddRegToInstr(MI, Instr, CurOp++ - 1);
if (CurOp < NumOps) if (CurOp < NumOps)
OK &= AddImmToInstr(MI, Instr, CurOp); OK &= AddImmToInstr(MI, Instr, CurOp);
break; break;
@@ -1061,7 +1069,11 @@ public:
break; break;
case X86II::MRMSrcMem: case X86II::MRMSrcMem:
// Matching doesn't fill this in completely, we have to choose operand 0
// for a tied register.
OK &= AddRegToInstr(MI, Instr, CurOp++); OK &= AddRegToInstr(MI, Instr, CurOp++);
if (AddTied)
OK &= AddRegToInstr(MI, Instr, CurOp++ - 1);
if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r || if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r ||
Opcode == X86::LEA16r || Opcode == X86::LEA32r) Opcode == X86::LEA16r || Opcode == X86::LEA32r)
OK &= AddLMemToInstr(MI, Instr, CurOp); OK &= AddLMemToInstr(MI, Instr, CurOp);