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Add integer load[r+r] forms.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-17 20:26:45 +00:00
parent 331355cf7d
commit 1963783fab
2 changed files with 46 additions and 0 deletions
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23
lib/Target/Sparc/SparcInstrInfo.td
View File

@ -107,26 +107,49 @@ let rd = 0 in
"cmp $b, $c", []>;
// Section B.1 - Load Integer Instructions, p. 90
def LDSBrr : F3_1<3, 0b001001,
(ops IntRegs:$dst, MEMrr:$addr),
"ldsb [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRrr:$addr, i8))]>;
def LDSBri : F3_2<3, 0b001001,
(ops IntRegs:$dst, MEMri:$addr),
"ldsb [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRri:$addr, i8))]>;
def LDSHrr : F3_1<3, 0b001010,
(ops IntRegs:$dst, MEMrr:$addr),
"ldsh [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRrr:$addr, i16))]>;
def LDSHri : F3_2<3, 0b001010,
(ops IntRegs:$dst, MEMri:$addr),
"ldsh [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRri:$addr, i16))]>;
def LDUBrr : F3_1<3, 0b000001,
(ops IntRegs:$dst, MEMrr:$addr),
"ldub [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRrr:$addr, i8))]>;
def LDUBri : F3_2<3, 0b000001,
(ops IntRegs:$dst, MEMri:$addr),
"ldub [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRri:$addr, i8))]>;
def LDUHrr : F3_1<3, 0b000010,
(ops IntRegs:$dst, MEMrr:$addr),
"lduh [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRrr:$addr, i16))]>;
def LDUHri : F3_2<3, 0b000010,
(ops IntRegs:$dst, MEMri:$addr),
"lduh [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRri:$addr, i16))]>;
def LDrr : F3_1<3, 0b000000,
(ops IntRegs:$dst, MEMrr:$addr),
"ld [$addr], $dst",
[(set IntRegs:$dst, (load ADDRrr:$addr))]>;
def LDri : F3_2<3, 0b000000,
(ops IntRegs:$dst, MEMri:$addr),
"ld [$addr], $dst",
[(set IntRegs:$dst, (load ADDRri:$addr))]>;
def LDDrr : F3_1<3, 0b000011,
(ops IntRegs:$dst, MEMrr:$addr),
"ldd [$addr], $dst", []>;
def LDDri : F3_2<3, 0b000011,
(ops IntRegs:$dst, MEMri:$addr),
"ldd [$addr], $dst", []>;

23
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -107,26 +107,49 @@ let rd = 0 in
"cmp $b, $c", []>;
// Section B.1 - Load Integer Instructions, p. 90
def LDSBrr : F3_1<3, 0b001001,
(ops IntRegs:$dst, MEMrr:$addr),
"ldsb [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRrr:$addr, i8))]>;
def LDSBri : F3_2<3, 0b001001,
(ops IntRegs:$dst, MEMri:$addr),
"ldsb [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRri:$addr, i8))]>;
def LDSHrr : F3_1<3, 0b001010,
(ops IntRegs:$dst, MEMrr:$addr),
"ldsh [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRrr:$addr, i16))]>;
def LDSHri : F3_2<3, 0b001010,
(ops IntRegs:$dst, MEMri:$addr),
"ldsh [$addr], $dst",
[(set IntRegs:$dst, (sextload ADDRri:$addr, i16))]>;
def LDUBrr : F3_1<3, 0b000001,
(ops IntRegs:$dst, MEMrr:$addr),
"ldub [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRrr:$addr, i8))]>;
def LDUBri : F3_2<3, 0b000001,
(ops IntRegs:$dst, MEMri:$addr),
"ldub [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRri:$addr, i8))]>;
def LDUHrr : F3_1<3, 0b000010,
(ops IntRegs:$dst, MEMrr:$addr),
"lduh [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRrr:$addr, i16))]>;
def LDUHri : F3_2<3, 0b000010,
(ops IntRegs:$dst, MEMri:$addr),
"lduh [$addr], $dst",
[(set IntRegs:$dst, (zextload ADDRri:$addr, i16))]>;
def LDrr : F3_1<3, 0b000000,
(ops IntRegs:$dst, MEMrr:$addr),
"ld [$addr], $dst",
[(set IntRegs:$dst, (load ADDRrr:$addr))]>;
def LDri : F3_2<3, 0b000000,
(ops IntRegs:$dst, MEMri:$addr),
"ld [$addr], $dst",
[(set IntRegs:$dst, (load ADDRri:$addr))]>;
def LDDrr : F3_1<3, 0b000011,
(ops IntRegs:$dst, MEMrr:$addr),
"ldd [$addr], $dst", []>;
def LDDri : F3_2<3, 0b000011,
(ops IntRegs:$dst, MEMri:$addr),
"ldd [$addr], $dst", []>;