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R600: optimize the UDIVREM 64 algorithm
This is a squash of several optimization commits: - calculate DIV_Lo and DIV_Hi separately - use BFE_U32 if we are operating on 32bit values - use precomputed constants instead of shifting in UDVIREM - skip the first 32 iterations of udivrem v2: Check whether BFE is supported before using it Patch by: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207589 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
parent
ea89cd8b52
commit
19a970b2da
@ -433,46 +433,68 @@ void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,
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EVT VT = Op.getValueType();
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EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext());
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SDValue one = DAG.getConstant(1, HalfVT);
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SDValue zero = DAG.getConstant(0, HalfVT);
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//HiLo split
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SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT,
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N->getOperand(0), DAG.getConstant(0, HalfVT));
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SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT,
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N->getOperand(0), DAG.getConstant(1, HalfVT));
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SDValue LHS = N->getOperand(0);
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SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, zero);
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SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, one);
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SDValue RHS = N->getOperand(1);
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SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, zero);
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SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, one);
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SDValue DIV = DAG.getConstant(0, VT);
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SDValue REM = DAG.getConstant(0, VT);
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// Get Speculative values
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SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_Hi, RHS_Lo);
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SDValue REM_Part = DAG.getNode(ISD::UREM, DL, HalfVT, LHS_Hi, RHS_Lo);
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SDValue REM_Hi = zero;
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SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, zero, REM_Part, LHS_Hi, ISD::SETEQ);
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SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, zero, DIV_Part, zero, ISD::SETEQ);
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SDValue DIV_Lo = zero;
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const unsigned bitWidth = VT.getSizeInBits();
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const unsigned halfBitWidth = HalfVT.getSizeInBits();
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SDValue one = DAG.getConstant(1, HalfVT);
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SDValue one_VT = DAG.getConstant(1, VT);
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for (unsigned i = 0; i < bitWidth; ++i) {
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SDValue POS = DAG.getConstant((bitWidth - i - 1) % halfBitWidth, HalfVT);
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for (unsigned i = 0; i < halfBitWidth; ++i) {
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SDValue POS = DAG.getConstant(halfBitWidth - i - 1, HalfVT);
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// Get Value of high bit
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SDValue HBit = DAG.getNode(ISD::SRL, DL, HalfVT,
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i < halfBitWidth ? LHS_Hi : LHS_Lo, POS);
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HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, one);
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HBit = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, HBit);
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SDValue HBit;
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if (halfBitWidth == 32 && Subtarget->hasBFE()) {
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HBit = DAG.getNode(AMDGPUISD::BFE_U32, DL, HalfVT, LHS_Lo, POS, one);
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} else {
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HBit = DAG.getNode(ISD::SRL, DL, HalfVT, LHS_Lo, POS);
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HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, one);
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}
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// Add the high bit to shifted remainder
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REM = DAG.getNode(ISD::SHL, DL, VT, REM, one);
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REM = DAG.getNode(ISD::OR, DL, VT, REM, HBit);
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SDValue Carry = DAG.getNode(ISD::SRL, DL, HalfVT, REM_Lo,
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DAG.getConstant(halfBitWidth - 1, HalfVT));
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REM_Hi = DAG.getNode(ISD::SHL, DL, HalfVT, REM_Hi, one);
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REM_Hi = DAG.getNode(ISD::OR, DL, HalfVT, REM_Hi, Carry);
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// Update DIV
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SDValue ShDIV = DAG.getNode(ISD::SHL, DL, VT, DIV, one);
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SDValue ShDIV_plus = DAG.getNode(ISD::OR, DL, VT, ShDIV, one_VT);
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REM_Lo = DAG.getNode(ISD::SHL, DL, HalfVT, REM_Lo, one);
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REM_Lo = DAG.getNode(ISD::OR, DL, HalfVT, REM_Lo, HBit);
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DIV = DAG.getSelectCC(DL, REM, RHS, ShDIV_plus, ShDIV, ISD::SETGE);
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SDValue REM = DAG.getNode(ISD::BUILD_PAIR, DL, VT, REM_Lo, REM_Hi);
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SDValue BIT = DAG.getConstant(1 << (halfBitWidth - i - 1), HalfVT);
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SDValue realBIT = DAG.getSelectCC(DL, REM, RHS, BIT, zero, ISD::SETGE);
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DIV_Lo = DAG.getNode(ISD::OR, DL, HalfVT, DIV_Lo, realBIT);
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// Update REM
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SDValue REM_sub = DAG.getNode(ISD::SUB, DL, VT, REM, RHS);
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REM = DAG.getSelectCC(DL, REM, RHS, REM_sub, REM, ISD::SETGE);
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REM_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, REM, zero);
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REM_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, REM, one);
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}
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SDValue REM = DAG.getNode(ISD::BUILD_PAIR, DL, VT, REM_Lo, REM_Hi);
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SDValue DIV = DAG.getNode(ISD::BUILD_PAIR, DL, VT, DIV_Lo, DIV_Hi);
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Results.push_back(DIV);
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Results.push_back(REM);
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break;
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84
test/CodeGen/R600/udivrem64.ll
Normal file
84
test/CodeGen/R600/udivrem64.ll
Normal file
@ -0,0 +1,84 @@
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;XUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s
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;FUNC-LABEL: @test_udiv
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;EG: RECIP_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;SI: S_ENDPGM
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define void @test_udiv(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%result = udiv i64 %x, %y
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: @test_urem
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;EG: RECIP_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;SI: S_ENDPGM
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define void @test_urem(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%result = urem i64 %x, %y
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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