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[ARMv8] Add support for the NEON instructions vmaxnm/vminnm.

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This adds a new class for non-predicable NEON instructions and a
new DecoderNamespace for v8 NEON instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186504 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joey Gouly
2013-07-17 13:59:38 +00:00
parent 946dbd83df
commit 19c14abf1c
6 changed files with 121 additions and 0 deletions
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18
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -499,7 +499,14 @@ DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
}
MI.clear();
result = decodeInstruction(DecoderTablev8NEON32, MI, insn, Address,
this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
}
MI.clear();
Size = 0;
return MCDisassembler::Fail;
}
@ -818,6 +825,17 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
}
}
MI.clear();
uint32_t NEONv8Insn = insn32;
NEONv8Insn &= 0xF3FFFFFF; // Clear bits 27-26
result = decodeInstruction(DecoderTablev8NEON32, MI, NEONv8Insn, Address,
this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
}
MI.clear();
Size = 0;
return MCDisassembler::Fail;
}