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Added getNumExplicitOperands and findFirstPredOperand.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37064 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-05-15 01:26:09 +00:00
parent 30d15757e3
commit 19e3f31f6a
2 changed files with 56 additions and 0 deletions
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10
include/llvm/CodeGen/MachineInstr.h
View File

@ -378,6 +378,9 @@ public:
return Operands[i];
}
/// getNumExplicitOperands - Returns the number of non-implicit operands.
///
unsigned getNumExplicitOperands() const;
/// isIdenticalTo - Return true if this instruction is identical to (same
/// opcode and same operands as) the specified instruction.
@ -413,11 +416,18 @@ public:
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
/// the specific register or NULL if it is not found.
MachineOperand *findRegisterDefOperand(unsigned Reg);
/// findFirstPredOperand() - Find the first operand in the operand list that
// is used to represent the predicate.
MachineOperand *findFirstPredOperand();
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
void copyKillDeadInfo(const MachineInstr *MI);
/// copyPredicates - Copies predicate operand(s) from MI.
void copyPredicates(const MachineInstr *MI);
//
// Debugging support
//

46
lib/CodeGen/MachineInstr.cpp
View File

@ -141,6 +141,21 @@ bool MachineInstr::OperandsComplete() const {
return false;
}
/// getNumExplicitOperands - Returns the number of non-implicit operands.
///
unsigned MachineInstr::getNumExplicitOperands() const {
unsigned NumOperands = TID->numOperands;
if ((TID->Flags & M_VARIABLE_OPS) == 0)
return NumOperands;
for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
const MachineOperand &MO = getOperand(NumOperands);
if (!MO.isRegister() || !MO.isImplicit())
NumOperands++;
}
return NumOperands;
}
/// isIdenticalTo - Return true if this operand is identical to the specified
/// operand.
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
@ -192,6 +207,19 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
}
return NULL;
}
/// findFirstPredOperand() - Find the first operand in the operand list that
// is used to represent the predicate.
MachineOperand *MachineInstr::findFirstPredOperand() {
const TargetInstrDescriptor *TID = getInstrDescriptor();
if (TID->Flags & M_PREDICATED) {
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
return &getOperand(i);
}
return NULL;
}
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
@ -213,6 +241,24 @@ void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
}
}
/// copyPredicates - Copies predicate operand(s) from MI.
void MachineInstr::copyPredicates(const MachineInstr *MI) {
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
if (TID->Flags & M_PREDICATED) {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
const MachineOperand &MO = MI->getOperand(i);
// Predicated operands must be last operands.
if (MO.isReg())
addRegOperand(MO.getReg(), false);
else {
addImmOperand(MO.getImm());
}
}
}
}
}
void MachineInstr::dump() const {
cerr << " " << *this;
}