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Small space optimization: Make MachineOperands take 16 bytes instead of

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20 on intel or 24 on sparc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4256 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-10-22 00:15:13 +00:00
parent cb2610ea03
commit 1a33e6eb74
1 changed files with 6 additions and 15 deletions
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21
include/llvm/CodeGen/MachineInstr.h
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@ -72,8 +72,6 @@ private:
static const char LOFLAG64 = 0x20; // operand is %lo64(value_or_immedVal) static const char LOFLAG64 = 0x20; // operand is %lo64(value_or_immedVal)
private: private:
MachineOperandType opType;
union { union {
Value* value; // BasicBlockVal for a label operand. Value* value; // BasicBlockVal for a label operand.
// ConstantVal for a non-address immediate. // ConstantVal for a non-address immediate.
@ -83,10 +81,10 @@ private:
int64_t immedVal; // constant value for an explicit constant int64_t immedVal; // constant value for an explicit constant
}; };
MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
char flags; // see bit field definitions above
int regNum; // register number for an explicit register int regNum; // register number for an explicit register
// will be set for a value after reg allocation // will be set for a value after reg allocation
char flags; // see bit field definitions above
public: public:
/*ctor*/ MachineOperand (); /*ctor*/ MachineOperand ();
/*ctor*/ MachineOperand (MachineOperandType operandType, /*ctor*/ MachineOperand (MachineOperandType operandType,
@ -189,25 +187,18 @@ private:
inline inline
MachineOperand::MachineOperand() MachineOperand::MachineOperand()
: opType(MO_VirtualRegister), : immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1)
immedVal(0),
regNum(-1),
flags(0)
{} {}
inline inline
MachineOperand::MachineOperand(MachineOperandType operandType, MachineOperand::MachineOperand(MachineOperandType operandType,
Value* _val) Value* _val)
: opType(operandType), : immedVal(0), opType(operandType), flags(0), regNum(-1)
immedVal(0),
regNum(-1),
flags(0)
{} {}
inline inline
MachineOperand::MachineOperand(const MachineOperand& mo) MachineOperand::MachineOperand(const MachineOperand& mo)
: opType(mo.opType), : opType(mo.opType), flags(mo.flags)
flags(mo.flags)
{ {
switch(opType) { switch(opType) {
case MO_VirtualRegister: case MO_VirtualRegister:
@ -276,7 +267,7 @@ MachineOperand::InitializeReg(int _regNum, bool isCCReg)
// a CALL (if any), and return value of a RETURN. // a CALL (if any), and return value of a RETURN.
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
class MachineInstr : public Annotable, // Values are annotable class MachineInstr : public Annotable, // MachineInstrs are annotable
public NonCopyable { // Disable copy operations public NonCopyable { // Disable copy operations
MachineOpCode opCode; // the opcode MachineOpCode opCode; // the opcode
OpCodeMask opCodeMask; // extra bits for variants of an opcode OpCodeMask opCodeMask; // extra bits for variants of an opcode