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Small space optimization: Make MachineOperands take 16 bytes instead of
20 on intel or 24 on sparc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4256 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -72,8 +72,6 @@ private:
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static const char LOFLAG64 = 0x20; // operand is %lo64(value_or_immedVal)
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private:
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MachineOperandType opType;
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union {
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Value* value; // BasicBlockVal for a label operand.
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// ConstantVal for a non-address immediate.
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@ -83,10 +81,10 @@ private:
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int64_t immedVal; // constant value for an explicit constant
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};
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MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
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char flags; // see bit field definitions above
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int regNum; // register number for an explicit register
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// will be set for a value after reg allocation
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char flags; // see bit field definitions above
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public:
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/*ctor*/ MachineOperand ();
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/*ctor*/ MachineOperand (MachineOperandType operandType,
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@ -189,25 +187,18 @@ private:
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inline
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MachineOperand::MachineOperand()
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: opType(MO_VirtualRegister),
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immedVal(0),
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regNum(-1),
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flags(0)
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: immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1)
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{}
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inline
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MachineOperand::MachineOperand(MachineOperandType operandType,
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Value* _val)
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: opType(operandType),
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immedVal(0),
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regNum(-1),
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flags(0)
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: immedVal(0), opType(operandType), flags(0), regNum(-1)
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{}
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inline
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MachineOperand::MachineOperand(const MachineOperand& mo)
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: opType(mo.opType),
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flags(mo.flags)
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: opType(mo.opType), flags(mo.flags)
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{
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switch(opType) {
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case MO_VirtualRegister:
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@ -276,7 +267,7 @@ MachineOperand::InitializeReg(int _regNum, bool isCCReg)
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// a CALL (if any), and return value of a RETURN.
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//---------------------------------------------------------------------------
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class MachineInstr : public Annotable, // Values are annotable
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class MachineInstr : public Annotable, // MachineInstrs are annotable
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public NonCopyable { // Disable copy operations
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MachineOpCode opCode; // the opcode
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OpCodeMask opCodeMask; // extra bits for variants of an opcode
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