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translateX86CC updates the last two operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42333 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-09-26 00:45:55 +00:00
parent 29be8486e3
commit 1a35edba13
1 changed files with 5 additions and 2 deletions
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7
lib/Target/X86/X86ISelLowering.cpp
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@ -3719,6 +3719,7 @@ SDOperand X86TargetLowering::LowerSETCC(SDOperand Op, SelectionDAG &DAG,
SDOperand X86TargetLowering::LowerSETCC_New(SDOperand Op, SelectionDAG &DAG) { SDOperand X86TargetLowering::LowerSETCC_New(SDOperand Op, SelectionDAG &DAG) {
assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer"); assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer");
SDOperand Cond;
SDOperand Op0 = Op.getOperand(0); SDOperand Op0 = Op.getOperand(0);
SDOperand Op1 = Op.getOperand(1); SDOperand Op1 = Op.getOperand(1);
SDOperand CC = Op.getOperand(2); SDOperand CC = Op.getOperand(2);
@ -3726,14 +3727,16 @@ SDOperand X86TargetLowering::LowerSETCC_New(SDOperand Op, SelectionDAG &DAG) {
bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType()); bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType());
unsigned X86CC; unsigned X86CC;
SDOperand Cond = DAG.getNode(X86ISD::CMP_NEW, MVT::i32, Op0, Op1);
if (translateX86CC(cast<CondCodeSDNode>(CC)->get(), isFP, X86CC, if (translateX86CC(cast<CondCodeSDNode>(CC)->get(), isFP, X86CC,
Op0, Op1, DAG)) Op0, Op1, DAG)) {
Cond = DAG.getNode(X86ISD::CMP_NEW, MVT::i32, Op0, Op1);
return DAG.getNode(X86ISD::SETCC_NEW, MVT::i8, return DAG.getNode(X86ISD::SETCC_NEW, MVT::i8,
DAG.getConstant(X86CC, MVT::i8), Cond); DAG.getConstant(X86CC, MVT::i8), Cond);
}
assert(isFP && "Illegal integer SetCC!"); assert(isFP && "Illegal integer SetCC!");
Cond = DAG.getNode(X86ISD::CMP_NEW, MVT::i32, Op0, Op1);
switch (SetCCOpcode) { switch (SetCCOpcode) {
default: assert(false && "Illegal floating point SetCC!"); default: assert(false && "Illegal floating point SetCC!");
case ISD::SETOEQ: { // !PF & ZF case ISD::SETOEQ: { // !PF & ZF