From 1a5b04c7250ea502e307076cf99bd2514e1d5fd0 Mon Sep 17 00:00:00 2001
From: Matthias Braun <matze@braunis.de>
Date: Tue, 30 Jun 2015 00:33:44 +0000
Subject: [PATCH] RegisterCoalescer: Cleanup empty subranges after
 shrinkToUses()

A call to removeEmptySubranges() is necessary after every operation that
potentially removes all segments from a subregister range; this case in
the register coalescer was missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241027 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/RegisterCoalescer.cpp             |  1 +
 .../AMDGPU/subreg-coalescer-undef-use.ll      | 20 +++++++++++++++++++
 2 files changed, 21 insertions(+)
 create mode 100644 test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll

diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp
index 7b7c7502172..7afea2a4f6f 100644
--- a/lib/CodeGen/RegisterCoalescer.cpp
+++ b/lib/CodeGen/RegisterCoalescer.cpp
@@ -1449,6 +1449,7 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
                    << format("%04X", S.LaneMask) << ")\n");
       LIS->shrinkToUses(S, LI.reg);
     }
+    LI.removeEmptySubRanges();
   }
   if (ShrinkMainRange) {
     LiveInterval &LI = LIS->getInterval(CP.getDstReg());
diff --git a/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll b/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
new file mode 100644
index 00000000000..e023a622984
--- /dev/null
+++ b/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
@@ -0,0 +1,20 @@
+; RUN: llc -march=amdgcn -mcpu=SI -o /dev/null %s
+; Don't crash when the use of an undefined value is only detected by the
+; register coalescer because it is hidden with subregister insert/extract.
+target triple="amdgcn--"
+
+define void @foobar(float %a0, float %a1, float addrspace(1)* %out) nounwind {
+entry:
+  %v0 = insertelement <4 x float> undef, float %a0, i32 0
+  br i1 undef, label %ift, label %ife
+
+ift:
+  %v1 = insertelement <4 x float> undef, float %a1, i32 0
+  br label %ife
+
+ife:
+  %val = phi <4 x float> [ %v1, %ift ], [ %v0, %entry ]
+  %v2 = extractelement <4 x float> %val, i32 1
+  store float %v2, float addrspace(1)* %out, align 4
+  ret void
+}