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[X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext

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This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits.
See PR20494 for details.

Differential Revision: http://reviews.llvm.org/D6128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221626 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Kuperstein 2014-11-10 20:40:21 +00:00
parent b3da08deb3
commit 1a66dc7468
2 changed files with 17 additions and 0 deletions
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1
lib/Target/X86/X86InstrCompiler.td
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@ -1191,6 +1191,7 @@ def def32 : PatLeaf<(i32 GR32:$src), [{
return N->getOpcode() != ISD::TRUNCATE &&
N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
N->getOpcode() != ISD::CopyFromReg &&
N->getOpcode() != ISD::AssertSext &&
N->getOpcode() != X86ISD::CMOV;
}]>;

16
test/CodeGen/X86/TruncAssertZext.ll Normal file
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@ -0,0 +1,16 @@
; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertSext node
; PR20494
define i64 @main(i64 %a) {
; CHECK-LABEL: main
; CHECK: movl %ecx, %eax
; CHECK: ret
%or = or i64 %a, -2
%trunc = trunc i64 %or to i32
br label %l
l:
%ext = zext i32 %trunc to i64
ret i64 %ext
}