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implement CodeGen/X86/inline-asm-x-scalar.ll:test3

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35802 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-04-09 05:31:20 +00:00
parent 7dadb92c67
commit 1a6acc214d
1 changed files with 9 additions and 2 deletions
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11
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -2656,13 +2656,20 @@ void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
if (MVT::isVector(RegVT)) {
assert(Val.getValueType() == MVT::Vector &&"Not a vector-vector cast?");
Val = DAG.getNode(ISD::VBIT_CONVERT, RegVT, Val);
} else if (MVT::isInteger(RegVT)) {
} else if (MVT::isInteger(RegVT) && MVT::isInteger(Val.getValueType())) {
if (RegVT < ValueVT)
Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val);
else
Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
} else
} else if (MVT::isFloatingPoint(RegVT) &&
MVT::isFloatingPoint(Val.getValueType())) {
Val = DAG.getNode(ISD::FP_EXTEND, RegVT, Val);
} else if (MVT::getSizeInBits(RegVT) ==
MVT::getSizeInBits(Val.getValueType())) {
Val = DAG.getNode(ISD::BIT_CONVERT, RegVT, Val);
} else {
assert(0 && "Unknown mismatch!");
}
}
Chain = DAG.getCopyToReg(Chain, Regs[0], Val, Flag);
Flag = Chain.getValue(1);