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Eliminated the classification of control registers into %ecr_

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and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan
2010-05-06 20:59:00 +00:00
parent a5d0b54ec1
commit 1a8b789a4b
10 changed files with 38 additions and 70 deletions
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8
lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
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@@ -1034,14 +1034,10 @@ static int readModRM(struct InternalInstruction* insn) {
if (index > 7) \
*valid = 0; \
return prefix##_DR0 + index; \
case TYPE_CR32: \
if (index > 7) \
*valid = 0; \
return prefix##_ECR0 + index; \
case TYPE_CR64: \
case TYPE_CONTROLREG: \
if (index > 8) \
*valid = 0; \
return prefix##_RCR0 + index; \
return prefix##_CR0 + index; \
} \
}