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ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.
In particular, this preserves the kill flag, which allows the Thumb2 cbn?z optimization to be applied in cases where a branch has been re-created after the live variables analysis pass, e.g. by the machine block placement pass. This appears to be low risk; a number of other targets seem to already be doing something similar, e.g. AArch64, PowerPC. Differential Revision: http://reviews.llvm.org/D9184 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235639 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -410,6 +410,8 @@ ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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assert((Cond.size() == 2 || Cond.size() == 0) &&
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"ARM branch conditions have two components!");
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// For conditional branches, we use addOperand to preserve CPSR flags.
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if (!FBB) {
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if (Cond.empty()) { // Unconditional branch?
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if (isThumb)
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@ -418,13 +420,13 @@ ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
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} else
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BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
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.addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
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.addImm(Cond[0].getImm()).addOperand(Cond[1]);
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return 1;
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}
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// Two-way conditional branch.
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BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
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.addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
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.addImm(Cond[0].getImm()).addOperand(Cond[1]);
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if (isThumb)
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BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0);
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else
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@ -79,7 +79,7 @@ declare void @terminatev()
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; CHECK: str r0, [sp, [[OFFSET:#[0-9]+]]]
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; CHECK: ldr [[R0:r[0-9]+]], [sp, [[OFFSET]]]
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; CHECK: {{.*}}@ %do.body.i.i.i
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; CHECK: cmp [[R0]], #0
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; CHECK: cbz [[R0]]
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%"class.std::__1::basic_string" = type { %"class.std::__1::__compressed_pair" }
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%"class.std::__1::__compressed_pair" = type { %"class.std::__1::__libcpp_compressed_pair_imp" }
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@ -3,8 +3,7 @@
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; CHECK: it ne
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; CHECK-NEXT: cmpne
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; CHECK-NEXT: bne [[JUMPTARGET:.LBB[0-9]+_[0-9]+]]
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; CHECK: cmp
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; CHECK-NEXT: beq
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; CHECK: cbz
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; CHECK-NEXT: %if.else163
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; CHECK-NEXT: mov.w
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; CHECK-NEXT: b
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