6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-11 00:39:36 +00:00
Code Issues Projects Releases Wiki Activity

[x86] Add a comment clarifying that this test should span all manners of

Browse Source 
generic DAG combining of shuffles relevant to x86.

My plan is to fold a bunch of the other DAG combining test cases into
this one, while converting them to use the nice new FileCheck assertion
syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218855 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2014-10-02 07:13:25 +00:00
parent 0c9da85213
commit 1ad4741e91
1 changed files with 5 additions and 0 deletions

5
test/CodeGen/X86/vector-shuffle-combining.ll

@ -1,4 +1,9 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-SSE2
;
; Verify that the DAG combiner correctly folds bitwise operations across
; shuffles, nested shuffles with undef, pairs of nested shuffles, and other
; basic and always-safe patterns. Also test that the DAG combiner will combine
; target-specific shuffle instructions where reasonable.
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"