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Refactor AtomicExpandPass and add a generic isAtomic() method to Instruction
Summary: Split shouldExpandAtomicInIR() into different versions for Stores/Loads/RMWs/CmpXchgs. Makes runOnFunction cleaner (no more redundant checking/casting), and will help moving the X86 backend to this pass. This requires a way of easily detecting which instructions are atomic. I followed the pattern of mayReadFromMemory, mayWriteOrReadMemory, etc.. in making isAtomic() a method of Instruction implemented by a switch on the opcodes. Test Plan: make check Reviewers: jfb Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D5035 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217080 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -31,6 +31,7 @@
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#include "llvm/IR/CallSite.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/InlineAsm.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Target/TargetCallingConv.h"
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@@ -955,7 +956,7 @@ public:
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/// It is called by AtomicExpandPass before expanding an
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/// AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad.
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/// RMW and CmpXchg set both IsStore and IsLoad to true.
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/// Backends with !getInsertFencesForAtomic() should keep a no-op here
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/// Backends with !getInsertFencesForAtomic() should keep a no-op here.
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virtual void emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
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bool IsStore, bool IsLoad) const {
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assert(!getInsertFencesForAtomic());
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@@ -965,20 +966,28 @@ public:
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/// It is called by AtomicExpandPass after expanding an
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/// AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad.
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/// RMW and CmpXchg set both IsStore and IsLoad to true.
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/// Backends with !getInsertFencesForAtomic() should keep a no-op here
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/// Backends with !getInsertFencesForAtomic() should keep a no-op here.
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virtual void emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
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bool IsStore, bool IsLoad) const {
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assert(!getInsertFencesForAtomic());
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}
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/// Return true if the given (atomic) instruction should be expanded by the
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/// IR-level AtomicExpand pass into a loop involving
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/// load-linked/store-conditional pairs. Atomic stores will be expanded in the
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/// same way as "atomic xchg" operations which ignore their output if needed.
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virtual bool shouldExpandAtomicInIR(Instruction *Inst) const {
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/// Returns true if the given (atomic) store should be expanded by the
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/// IR-level AtomicExpand pass into an "atomic xchg" which ignores its input.
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virtual bool shouldExpandAtomicStoreInIR(StoreInst *SI) const {
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return false;
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}
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/// Returns true if the given (atomic) load should be expanded by the
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/// IR-level AtomicExpand pass into a load-linked instruction
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/// (through emitLoadLinked()).
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virtual bool shouldExpandAtomicLoadInIR(LoadInst *LI) const { return false; }
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/// Returns true if the given AtomicRMW should be expanded by the
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/// IR-level AtomicExpand pass into a loop using LoadLinked/StoreConditional.
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virtual bool shouldExpandAtomicRMWInIR(AtomicRMWInst *RMWI) const {
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return false;
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}
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//===--------------------------------------------------------------------===//
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// TargetLowering Configuration Methods - These methods should be invoked by
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