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Fix last bits of MC layer issues. llvm-mc doesn't need to initialize TargetMachine's anymore.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-07-25 20:53:02 +00:00
parent af6981f2f5
commit 1b0fc9b418
8 changed files with 27 additions and 63 deletions
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11
include/llvm/Target/TargetRegistry.h
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@ -89,6 +89,7 @@ namespace llvm {
typedef TargetAsmBackend *(*AsmBackendCtorTy)(const Target &T, typedef TargetAsmBackend *(*AsmBackendCtorTy)(const Target &T,
const std::string &TT); const std::string &TT);
typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T, typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T,
const MCRegisterInfo &MRI,
const MCAsmInfo &MAI); const MCAsmInfo &MAI);
typedef TargetAsmParser *(*AsmParserCtorTy)(MCSubtargetInfo &STI, typedef TargetAsmParser *(*AsmParserCtorTy)(MCSubtargetInfo &STI,
MCAsmParser &P); MCAsmParser &P);
@ -333,10 +334,11 @@ namespace llvm {
/// createAsmLexer - Create a target specific assembly lexer. /// createAsmLexer - Create a target specific assembly lexer.
/// ///
TargetAsmLexer *createAsmLexer(const MCAsmInfo &MAI) const { TargetAsmLexer *createAsmLexer(const MCRegisterInfo &MRI,
const MCAsmInfo &MAI) const {
if (!AsmLexerCtorFn) if (!AsmLexerCtorFn)
return 0; return 0;
return AsmLexerCtorFn(*this, MAI); return AsmLexerCtorFn(*this, MRI, MAI);
} }
/// createAsmParser - Create a target specific assembly parser. /// createAsmParser - Create a target specific assembly parser.
@ -989,8 +991,9 @@ namespace llvm {
} }
private: private:
static TargetAsmLexer *Allocator(const Target &T, const MCAsmInfo &MAI) { static TargetAsmLexer *Allocator(const Target &T, const MCRegisterInfo &MRI,
return new AsmLexerImpl(T, MAI); const MCAsmInfo &MAI) {
return new AsmLexerImpl(T, MRI, MAI);
} }
}; };

28
lib/MC/MCDisassembler/EDDisassembler.cpp
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@ -34,8 +34,6 @@
#include "llvm/Support/MemoryObject.h" #include "llvm/Support/MemoryObject.h"
#include "llvm/Support/SourceMgr.h" #include "llvm/Support/SourceMgr.h"
#include "llvm/Target/TargetRegistry.h" #include "llvm/Target/TargetRegistry.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSelect.h" #include "llvm/Target/TargetSelect.h"
using namespace llvm; using namespace llvm;
@ -107,7 +105,6 @@ void EDDisassembler::initialize() {
sInitialized = true; sInitialized = true;
InitializeAllTargetInfos(); InitializeAllTargetInfos();
InitializeAllTargets();
InitializeAllTargetMCs(); InitializeAllTargetMCs();
InitializeAllAsmPrinters(); InitializeAllAsmPrinters();
InitializeAllAsmParsers(); InitializeAllAsmParsers();
@ -170,29 +167,18 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
if (!Tgt) if (!Tgt)
return; return;
std::string CPU; MRI.reset(Tgt->createMCRegInfo(tripleString));
std::string featureString;
TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
featureString));
// FIXME: It shouldn't be using TargetRegisterInfo! if (!MRI)
const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
if (!registerInfo)
return; return;
initMaps(*registerInfo); initMaps(*MRI);
AsmInfo.reset(Tgt->createMCAsmInfo(tripleString)); AsmInfo.reset(Tgt->createMCAsmInfo(tripleString));
if (!AsmInfo) if (!AsmInfo)
return; return;
MRI.reset(Tgt->createMCRegInfo(tripleString));
if (!MRI)
return;
Disassembler.reset(Tgt->createMCDisassembler()); Disassembler.reset(Tgt->createMCDisassembler());
if (!Disassembler) if (!Disassembler)
@ -208,10 +194,10 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
return; return;
GenericAsmLexer.reset(new AsmLexer(*AsmInfo)); GenericAsmLexer.reset(new AsmLexer(*AsmInfo));
SpecificAsmLexer.reset(Tgt->createAsmLexer(*AsmInfo)); SpecificAsmLexer.reset(Tgt->createAsmLexer(*MRI, *AsmInfo));
SpecificAsmLexer->InstallLexer(*GenericAsmLexer); SpecificAsmLexer->InstallLexer(*GenericAsmLexer);
initMaps(*TargetMachine->getRegisterInfo()); initMaps(*MRI);
Valid = true; Valid = true;
} }
@ -273,7 +259,7 @@ EDInst *EDDisassembler::createInst(EDByteReaderCallback byteReader,
} }
} }
void EDDisassembler::initMaps(const TargetRegisterInfo &registerInfo) { void EDDisassembler::initMaps(const MCRegisterInfo &registerInfo) {
unsigned numRegisters = registerInfo.getNumRegs(); unsigned numRegisters = registerInfo.getNumRegs();
unsigned registerIndex; unsigned registerIndex;

6
lib/MC/MCDisassembler/EDDisassembler.h
View File

@ -46,8 +46,6 @@ class SourceMgr;
class Target; class Target;
class TargetAsmLexer; class TargetAsmLexer;
class TargetAsmParser; class TargetAsmParser;
class TargetMachine;
class TargetRegisterInfo;
struct EDInstInfo; struct EDInstInfo;
struct EDInst; struct EDInst;
@ -137,8 +135,6 @@ struct EDDisassembler {
CPUKey Key; CPUKey Key;
/// The LLVM target corresponding to the disassembler /// The LLVM target corresponding to the disassembler
const llvm::Target *Tgt; const llvm::Target *Tgt;
/// The target machine instance.
llvm::OwningPtr<llvm::TargetMachine> TargetMachine;
/// The assembly information for the target architecture /// The assembly information for the target architecture
llvm::OwningPtr<const llvm::MCAsmInfo> AsmInfo; llvm::OwningPtr<const llvm::MCAsmInfo> AsmInfo;
// The register information for the target architecture. // The register information for the target architecture.
@ -219,7 +215,7 @@ struct EDDisassembler {
/// info /// info
/// ///
/// @arg registerInfo - the register information to use as a source /// @arg registerInfo - the register information to use as a source
void initMaps(const llvm::TargetRegisterInfo &registerInfo); void initMaps(const llvm::MCRegisterInfo &registerInfo);
/// nameWithRegisterID - Returns the name (owned by the EDDisassembler) of a /// nameWithRegisterID - Returns the name (owned by the EDDisassembler) of a
/// register for a given register ID, or NULL on failure /// register for a given register ID, or NULL on failure
/// ///

23
lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
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@ -8,14 +8,13 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "ARM.h" #include "ARM.h"
#include "ARMTargetMachine.h"
#include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/TargetAsmLexer.h" #include "llvm/MC/TargetAsmLexer.h"
#include "llvm/Target/TargetMachine.h" // FIXME
#include "llvm/Target/TargetRegistry.h" #include "llvm/Target/TargetRegistry.h"
#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/OwningPtr.h"
@ -43,7 +42,7 @@ protected:
rmap_ty RegisterMap; rmap_ty RegisterMap;
void InitRegisterMap(const TargetRegisterInfo *info) { void InitRegisterMap(const MCRegisterInfo *info) {
unsigned numRegs = info->getNumRegs(); unsigned numRegs = info->getNumRegs();
for (unsigned i = 0; i < numRegs; ++i) { for (unsigned i = 0; i < numRegs; ++i) {
@ -83,27 +82,17 @@ public:
class ARMAsmLexer : public ARMBaseAsmLexer { class ARMAsmLexer : public ARMBaseAsmLexer {
public: public:
ARMAsmLexer(const Target &T, const MCAsmInfo &MAI) ARMAsmLexer(const Target &T, const MCRegisterInfo &MRI, const MCAsmInfo &MAI)
: ARMBaseAsmLexer(T, MAI) { : ARMBaseAsmLexer(T, MAI) {
std::string tripleString("arm-unknown-unknown"); InitRegisterMap(&MRI);
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
} }
}; };
class ThumbAsmLexer : public ARMBaseAsmLexer { class ThumbAsmLexer : public ARMBaseAsmLexer {
public: public:
ThumbAsmLexer(const Target &T, const MCAsmInfo &MAI) ThumbAsmLexer(const Target &T, const MCRegisterInfo &MRI,const MCAsmInfo &MAI)
: ARMBaseAsmLexer(T, MAI) { : ARMBaseAsmLexer(T, MAI) {
std::string tripleString("thumb-unknown-unknown"); InitRegisterMap(&MRI);
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
} }
}; };

15
lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp
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@ -8,7 +8,6 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "MBlaze.h" #include "MBlaze.h"
#include "MBlazeTargetMachine.h"
#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
@ -17,9 +16,9 @@
#include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/TargetAsmLexer.h" #include "llvm/MC/TargetAsmLexer.h"
#include "llvm/Target/TargetMachine.h" // FIXME
#include "llvm/Target/TargetRegistry.h" #include "llvm/Target/TargetRegistry.h"
#include <string> #include <string>
@ -42,7 +41,7 @@ namespace {
rmap_ty RegisterMap; rmap_ty RegisterMap;
void InitRegisterMap(const TargetRegisterInfo *info) { void InitRegisterMap(const MCRegisterInfo *info) {
unsigned numRegs = info->getNumRegs(); unsigned numRegs = info->getNumRegs();
for (unsigned i = 0; i < numRegs; ++i) { for (unsigned i = 0; i < numRegs; ++i) {
@ -82,14 +81,10 @@ namespace {
class MBlazeAsmLexer : public MBlazeBaseAsmLexer { class MBlazeAsmLexer : public MBlazeBaseAsmLexer {
public: public:
MBlazeAsmLexer(const Target &T, const MCAsmInfo &MAI) MBlazeAsmLexer(const Target &T, const MCRegisterInfo &MRI,
const MCAsmInfo &MAI)
: MBlazeBaseAsmLexer(T, MAI) { : MBlazeBaseAsmLexer(T, MAI) {
std::string tripleString("mblaze-unknown-unknown"); InitRegisterMap(&MRI);
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
} }
}; };
} }

2
lib/Target/X86/AsmParser/X86AsmLexer.cpp
View File

@ -60,7 +60,7 @@ protected:
} }
} }
public: public:
X86AsmLexer(const Target &T, const MCAsmInfo &MAI) X86AsmLexer(const Target &T, const MCRegisterInfo &MRI, const MCAsmInfo &MAI)
: TargetAsmLexer(T), AsmInfo(MAI), tentativeIsValid(false) { : TargetAsmLexer(T), AsmInfo(MAI), tentativeIsValid(false) {
} }
}; };

3
tools/llvm-mc/llvm-mc.cpp
View File

@ -26,7 +26,6 @@
#include "llvm/MC/SubtargetFeature.h" #include "llvm/MC/SubtargetFeature.h"
#include "llvm/MC/TargetAsmBackend.h" #include "llvm/MC/TargetAsmBackend.h"
#include "llvm/MC/TargetAsmParser.h" #include "llvm/MC/TargetAsmParser.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetRegistry.h" #include "llvm/Target/TargetRegistry.h"
#include "llvm/Target/TargetSelect.h" #include "llvm/Target/TargetSelect.h"
#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/OwningPtr.h"
@ -452,8 +451,6 @@ int main(int argc, char **argv) {
// Initialize targets and assembly printers/parsers. // Initialize targets and assembly printers/parsers.
llvm::InitializeAllTargetInfos(); llvm::InitializeAllTargetInfos();
// FIXME: We shouldn't need to initialize the Target(Machine)s.
llvm::InitializeAllTargets();
llvm::InitializeAllTargetMCs(); llvm::InitializeAllTargetMCs();
llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers(); llvm::InitializeAllAsmParsers();

2
tools/llvm-objdump/llvm-objdump.cpp
View File

@ -308,8 +308,6 @@ int main(int argc, char **argv) {
// Initialize targets and assembly printers/parsers. // Initialize targets and assembly printers/parsers.
llvm::InitializeAllTargetInfos(); llvm::InitializeAllTargetInfos();
// FIXME: We shouldn't need to initialize the Target(Machine)s.
llvm::InitializeAllTargets();
llvm::InitializeAllTargetMCs(); llvm::InitializeAllTargetMCs();
llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers(); llvm::InitializeAllAsmParsers();