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[PowerPC] Add a test for truncating a shifted load
We now produce the desired code as noted in the README.txt file. Remove the README entry and add a regression test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225209 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -255,24 +255,6 @@ int f(signed char *a, _Bool b, _Bool c) {
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===-------------------------------------------------------------------------===
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This:
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int test(unsigned *P) { return *P >> 24; }
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Should compile to:
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_test:
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lbz r3,0(r3)
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blr
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not:
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_test:
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lwz r2, 0(r3)
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srwi r3, r2, 24
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blr
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===-------------------------------------------------------------------------===
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On the G5, logical CR operations are more expensive in their three
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address form: ops that read/write the same register are half as expensive as
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those that read from two registers that are different from their destination.
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18
test/CodeGen/PowerPC/lbz-from-ld-shift.ll
Normal file
18
test/CodeGen/PowerPC/lbz-from-ld-shift.ll
Normal file
@ -0,0 +1,18 @@
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; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readonly
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define signext i32 @test(i32* nocapture readonly %P) #0 {
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entry:
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%0 = load i32* %P, align 4
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%shr = lshr i32 %0, 24
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ret i32 %shr
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; CHECK-LABEL: @test
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; CHECK: lbz 3, 0(3)
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; CHECK: blr
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}
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attributes #0 = { nounwind readonly }
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