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R600: Remove dead code

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219242 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-10-07 21:29:56 +00:00
parent de7465af34
commit 1ba00eab26
2 changed files with 1 additions and 18 deletions
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17
lib/Target/R600/AMDGPUInstrInfo.cpp
View File

@ -86,21 +86,6 @@ AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
// TODO: Implement this function
return nullptr;
}
bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter,
MachineBasicBlock &MBB) const {
while (iter != MBB.end()) {
switch (iter->getOpcode()) {
default:
break;
case AMDGPU::BRANCH_COND_i32:
case AMDGPU::BRANCH_COND_f32:
case AMDGPU::BRANCH:
return true;
};
++iter;
}
return false;
}
void
AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
@ -352,7 +337,7 @@ int AMDGPUInstrInfo::getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const {
}
// Wrapper for Tablegen'd function. enum Subtarget is not defined in any
// header files, so we need to wrap it in a function that takes unsigned
// header files, so we need to wrap it in a function that takes unsigned
// instead.
namespace llvm {
namespace AMDGPU {

2
lib/Target/R600/AMDGPUInstrInfo.h
View File

@ -40,8 +40,6 @@ class MachineInstrBuilder;
class AMDGPUInstrInfo : public AMDGPUGenInstrInfo {
private:
const AMDGPURegisterInfo RI;
bool getNextBranchInstr(MachineBasicBlock::iterator &iter,
MachineBasicBlock &MBB) const;
virtual void anchor();
protected:
const AMDGPUSubtarget &ST;