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Emit movq for 64-bit register to XMM register moves, but continue to accept
movd when assembling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2850,11 +2850,11 @@ def MOVDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
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[(set VR128:$dst,
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(v4i32 (scalar_to_vector (loadi32 addr:$src))))]>;
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def MOV64toPQIrr : RPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2i64 (scalar_to_vector GR64:$src)))]>;
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def MOV64toSDrr : RPDI<0x6E, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set FR64:$dst, (bitconvert GR64:$src))]>;
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@ -2895,7 +2895,7 @@ def MOVPDI2DImr : PDI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR128:$src),
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(iPTR 0))), addr:$dst)]>;
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def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, (vector_extract (v2i64 VR128:$src),
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(iPTR 0)))]>;
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def MOV64toSDrm : S3SI<0x7E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src),
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@ -2903,7 +2903,7 @@ def MOV64toSDrm : S3SI<0x7E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src),
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[(set FR64:$dst, (bitconvert (loadi64 addr:$src)))]>;
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def MOVSDto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, (bitconvert FR64:$src))]>;
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def MOVSDto64mr : RPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src),
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"movq\t{$src, $dst|$dst, $src}",
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@ -2931,7 +2931,7 @@ def VMOVZDI2PDIrr : VPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src),
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(v4i32 (scalar_to_vector GR32:$src)))))]>,
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VEX;
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def VMOVZQI2PQIrr : VPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
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"movq\t{$src, $dst|$dst, $src}", // X86-64 only
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[(set VR128:$dst, (v2i64 (X86vzmovl
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(v2i64 (scalar_to_vector GR64:$src)))))]>,
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VEX, VEX_W;
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@ -2942,7 +2942,7 @@ def MOVZDI2PDIrr : PDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src),
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[(set VR128:$dst, (v4i32 (X86vzmovl
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(v4i32 (scalar_to_vector GR32:$src)))))]>;
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def MOVZQI2PQIrr : RPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
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"mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
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"movq\t{$src, $dst|$dst, $src}", // X86-64 only
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[(set VR128:$dst, (v2i64 (X86vzmovl
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(v2i64 (scalar_to_vector GR64:$src)))))]>;
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}
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@ -2968,6 +2968,21 @@ def : Pat<(v4i32 (X86vzmovl (bc_v4i32 (loadv2i64 addr:$src)))),
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(MOVZDI2PDIrm addr:$src)>;
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}
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// We used to emit this syntax to work around a bug in the Darwin assembler,
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// so we'll continue to assemble it.
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MOV64toPQIrr VR128:$dst, GR64:$src), 0>;
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MOV64toSDrr FR64:$dst, GR64:$src), 0>;
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MOVPQIto64rr GR64:$dst, VR128:$src), 0>;
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MOVSDto64rr GR64:$dst, FR64:$src), 0>;
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(VMOVZQI2PQIrr VR128:$dst, GR64:$src), 0>;
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MOVZQI2PQIrr VR128:$dst, GR64:$src), 0>;
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//===---------------------------------------------------------------------===//
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// SSE2 - Move Quadword
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//===---------------------------------------------------------------------===//
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@ -1,13 +1,31 @@
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; RUN: llc < %s -march=x86-64 | grep movd | count 2
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; RUN: llc < %s -march=x86-64 | FileCheck %s
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; RUN: llc < %s -march=x86-64 | not grep rsp
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define i64 @test1(double %A) {
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; CHECK: test1
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; CHECK: movq
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%B = bitcast double %A to i64
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ret i64 %B
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}
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define double @test2(i64 %A) {
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; CHECK: test2
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; CHECK: movq
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%B = bitcast i64 %A to double
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ret double %B
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}
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define i32 @test3(float %A) {
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; CHECK: test3
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; CHECK: movd
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%B = bitcast float %A to i32
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ret i32 %B
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}
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define float @test4(i32 %A) {
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; CHECK: test4
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; CHECK: movd
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%B = bitcast i32 %A to float
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ret float %B
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}
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@ -1,7 +1,7 @@
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
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; CHECK-NOT: movsd
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; CHECK: movd {{%rdi|%rcx}}, %xmm0
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; CHECK: movq {{%rdi|%rcx}}, %xmm0
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; CHECK-NOT: movsd
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define <2 x i64> @test(i64 %i) nounwind {
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86-64 | grep movd | count 1
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; RUN: llc < %s -march=x86-64 | grep movq | count 1
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; RUN: llc < %s -march=x86-64 | grep {movlhps.*%xmm0, %xmm0}
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define <2 x i64> @test3(i64 %A) nounwind {
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@ -1,6 +1,6 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
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; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq
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define <2 x i64> @t1(i64 %x) nounwind {
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%tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
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@ -1,7 +1,7 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2
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; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 1
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; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 4
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; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor
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define <4 x i32> @t1(i32 %a) nounwind {
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@ -1,7 +1,7 @@
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
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; CHECK-NOT: xor
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; CHECK: movd {{%rdi|%rcx}}, %xmm0
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; CHECK: movq {{%rdi|%rcx}}, %xmm0
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; CHECK-NOT: xor
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; PR2108
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@ -1128,3 +1128,11 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
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// CHECK: strq
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// CHECK: encoding: [0x48,0x0f,0x00,0xc8]
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str %rax
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// CHECK: movq %rdi, %xmm0
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// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
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movq %rdi,%xmm0
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// CHECK: movq %rdi, %xmm0
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// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
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movd %rdi,%xmm0
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@ -1444,9 +1444,9 @@ vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11
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// CHECK: encoding: [0xc5,0x79,0x7e,0x30]
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vmovd %xmm14, (%rax)
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// CHECK: vmovd %rax, %xmm14
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// CHECK: encoding: [0xc4,0x61,0xf9,0x6e,0xf0]
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vmovd %rax, %xmm14
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// CHECK: vmovd %eax, %xmm14
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// CHECK: encoding: [0xc5,0x79,0x6e,0xf0]
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vmovd %eax, %xmm14
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// CHECK: vmovq %xmm14, (%rax)
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// CHECK: encoding: [0xc5,0x79,0xd6,0x30]
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