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[X86] Limit maximum nop length on Silvermont
Silvermont can only decode one instruction per cycle if the instruction exceeds 8 bytes. Also in Silvermont instructions with more than 3 prefixes will cause 3 cycle penalty. Maximum nop length is limited to 7 bytes when used for padding on Silvermont. For other x86 processors max nop length remains unchanged 15 bytes. Differential Revision: http://reviews.llvm.org/D4374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212321 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -73,11 +73,12 @@ public:
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};
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};
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class X86AsmBackend : public MCAsmBackend {
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class X86AsmBackend : public MCAsmBackend {
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StringRef CPU;
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const StringRef CPU;
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bool HasNopl;
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bool HasNopl;
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const uint64_t MaxNopLength;
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public:
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public:
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X86AsmBackend(const Target &T, StringRef _CPU)
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X86AsmBackend(const Target &T, StringRef _CPU)
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: MCAsmBackend(), CPU(_CPU) {
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: MCAsmBackend(), CPU(_CPU), MaxNopLength(_CPU == "slm" ? 7 : 15) {
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HasNopl = CPU != "generic" && CPU != "i386" && CPU != "i486" &&
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HasNopl = CPU != "generic" && CPU != "i386" && CPU != "i486" &&
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CPU != "i586" && CPU != "pentium" && CPU != "pentium-mmx" &&
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CPU != "i586" && CPU != "pentium" && CPU != "pentium-mmx" &&
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CPU != "i686" && CPU != "k6" && CPU != "k6-2" && CPU != "k6-3" &&
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CPU != "i686" && CPU != "k6" && CPU != "k6-2" && CPU != "k6-3" &&
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@ -331,7 +332,7 @@ bool X86AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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// 15 is the longest single nop instruction. Emit as many 15-byte nops as
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// 15 is the longest single nop instruction. Emit as many 15-byte nops as
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// needed, then emit a nop of the remaining length.
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// needed, then emit a nop of the remaining length.
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do {
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do {
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const uint8_t ThisNopLength = (uint8_t) std::min(Count, (uint64_t) 15);
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const uint8_t ThisNopLength = (uint8_t) std::min(Count, MaxNopLength);
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const uint8_t Prefixes = ThisNopLength <= 10 ? 0 : ThisNopLength - 10;
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const uint8_t Prefixes = ThisNopLength <= 10 ? 0 : ThisNopLength - 10;
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for (uint8_t i = 0; i < Prefixes; i++)
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for (uint8_t i = 0; i < Prefixes; i++)
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OW->Write8(0x66);
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OW->Write8(0x66);
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@ -2,6 +2,7 @@
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-apple-darwin10.0 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-apple-darwin10.0 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-apple-darwin8 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-apple-darwin8 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=slm %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=SLM %s
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# Ensure alignment directives also emit sequences of 15-byte NOPs on processors
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# Ensure alignment directives also emit sequences of 15-byte NOPs on processors
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# capable of using long NOPs.
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# capable of using long NOPs.
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@ -13,3 +14,12 @@ inc %eax
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# CHECK-NEXT: 10: nop
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# CHECK-NEXT: 10: nop
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# CHECK-NEXT: 1f: nop
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# CHECK-NEXT: 1f: nop
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# CHECK-NEXT: 20: inc
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# CHECK-NEXT: 20: inc
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# On Silvermont we emit only 7 byte NOPs since longer NOPs are not profitable
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# SLM: 0: inc
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# SLM-NEXT: 1: nop
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# SLM-NEXT: 8: nop
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# SLM-NEXT: f: nop
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# SLM-NEXT: 16: nop
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# SLM-NEXT: 1d: nop
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# SLM-NEXT: 20: inc
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@ -14,6 +14,7 @@
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=c3 %s | llvm-objdump -d - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=c3 %s | llvm-objdump -d - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=c3-2 %s | llvm-objdump -d - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=c3-2 %s | llvm-objdump -d - | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=core2 %s | llvm-objdump -d - | FileCheck --check-prefix=NOPL %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=core2 %s | llvm-objdump -d - | FileCheck --check-prefix=NOPL %s
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# RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=slm %s | llvm-objdump -d - | FileCheck --check-prefix=NOPL %s
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inc %eax
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inc %eax
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