6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-22 13:29:44 +00:00
Code Issues Projects Releases Wiki Activity

Implement PowerPC/eqv-andc-orc-nor.ll:EQV3

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23494 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-09-28 18:04:52 +00:00
parent 3e63428b2d
commit 1bd8b7b06e
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
View File

@ -1012,12 +1012,16 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
N = I;
return SDOperand(N, 0);
}
// Finally, check for the case where we are being asked to select
// Check for the case where we are being asked to select
// xor (not(a), b) which is equivalent to not(xor a, b), which is eqv
if (isOprNot(N->getOperand(0).Val))
CurDAG->SelectNodeTo(N, PPC::EQV, MVT::i32,
Select(N->getOperand(0).getOperand(0)),
Select(N->getOperand(1)));
else if (isOprNot(N->getOperand(1).Val))
CurDAG->SelectNodeTo(N, PPC::EQV, MVT::i32,
Select(N->getOperand(1).getOperand(0)),
Select(N->getOperand(0)));
else
CurDAG->SelectNodeTo(N, PPC::XOR, MVT::i32, Select(N->getOperand(0)),
Select(N->getOperand(1)));