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- Supposely movlhps is faster / better than unpcklpd.

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- Don't forget pshufd is only available with sse2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26956 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2006-03-22 19:16:21 +00:00
parent 6bf9791d51
commit 1bffadd7fb
2 changed files with 16 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/X86/X86ISelLowering.cpp
View File

@@ -2242,7 +2242,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1,
DAG.getNode(ISD::UNDEF, V1.getValueType()), DAG.getNode(ISD::UNDEF, V1.getValueType()),
PermMask); PermMask);
} else if (X86::isPSHUFDMask(PermMask.Val)) { } else if (Subtarget->hasSSE2() && X86::isPSHUFDMask(PermMask.Val)) {
if (V2.getOpcode() == ISD::UNDEF) if (V2.getOpcode() == ISD::UNDEF)
// Leave the VECTOR_SHUFFLE alone. It matches PSHUFD. // Leave the VECTOR_SHUFFLE alone. It matches PSHUFD.
return SDOperand(); return SDOperand();
@@ -2375,5 +2375,6 @@ bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
/// are assumed to be legal. /// are assumed to be legal.
bool X86TargetLowering::isShuffleMaskLegal(SDOperand Mask) const { bool X86TargetLowering::isShuffleMaskLegal(SDOperand Mask) const {
return (X86::isSplatMask(Mask.Val) || X86::isPSHUFDMask(Mask.Val)); return (X86::isSplatMask(Mask.Val) ||
(Subtarget->hasSSE2() && X86::isPSHUFDMask(Mask.Val)));
} }

22
lib/Target/X86/X86InstrSSE.td
View File

@@ -55,7 +55,7 @@ def SHUFP_splat_mask : PatLeaf<(build_vector), [{
return X86::isSplatMask(N); return X86::isSplatMask(N);
}], SHUFFLE_get_shuf_imm>; }], SHUFFLE_get_shuf_imm>;
def UNPCKLP_splat_mask : PatLeaf<(build_vector), [{ def MOVLHPS_splat_mask : PatLeaf<(build_vector), [{
return X86::isSplatMask(N); return X86::isSplatMask(N);
}]>; }]>;
@@ -810,18 +810,22 @@ def : Pat<(v16i8 (X86s2vec R32:$src)), (MOVD128rr R32:$src)>,
// Splat v4f32 / v4i32 // Splat v4f32 / v4i32
def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), SHUFP_splat_mask:$sm), def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), SHUFP_splat_mask:$sm),
(v4f32 (SHUFPSrr VR128:$src, VR128:$src, SHUFP_splat_mask:$sm))>; (v4f32 (SHUFPSrr VR128:$src, VR128:$src, SHUFP_splat_mask:$sm))>,
Requires<[HasSSE1]>;
def : Pat<(vector_shuffle (v4i32 VR128:$src), (undef), SHUFP_splat_mask:$sm), def : Pat<(vector_shuffle (v4i32 VR128:$src), (undef), SHUFP_splat_mask:$sm),
(v4i32 (SHUFPSrr VR128:$src, VR128:$src, SHUFP_splat_mask:$sm))>; (v4i32 (SHUFPSrr VR128:$src, VR128:$src, SHUFP_splat_mask:$sm))>,
Requires<[HasSSE1]>;
// Splat v2f64 / v2i64 // Splat v2f64 / v2i64
def : Pat<(vector_shuffle (v2f64 VR128:$src), (undef), UNPCKLP_splat_mask:$sm), def : Pat<(vector_shuffle (v2f64 VR128:$src), (undef), MOVLHPS_splat_mask:$sm),
(v2f64 (UNPCKLPDrr VR128:$src, VR128:$src))>; (v2f64 (MOVLHPSrr VR128:$src))>, Requires<[HasSSE1]>;
def : Pat<(vector_shuffle (v2i64 VR128:$src), (undef), UNPCKLP_splat_mask:$sm), def : Pat<(vector_shuffle (v2i64 VR128:$src), (undef), MOVLHPS_splat_mask:$sm),
(v2i64 (UNPCKLPDrr VR128:$src, VR128:$src))>; (v2i64 (MOVLHPSrr VR128:$src))>, Requires<[HasSSE1]>;
// Shuffle v4f32 / v4i32, undef. These should only match if splat cases do not. // Shuffle v4f32 / v4i32, undef. These should only match if splat cases do not.
def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), PSHUFD_shuffle_mask:$sm), def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), PSHUFD_shuffle_mask:$sm),
(v4f32 (PSHUFDrr VR128:$src, PSHUFD_shuffle_mask:$sm))>; (v4f32 (PSHUFDrr VR128:$src, PSHUFD_shuffle_mask:$sm))>,
Requires<[HasSSE2]>;
def : Pat<(vector_shuffle (v4i32 VR128:$src), (undef), PSHUFD_shuffle_mask:$sm), def : Pat<(vector_shuffle (v4i32 VR128:$src), (undef), PSHUFD_shuffle_mask:$sm),
(v4i32 (PSHUFDrr VR128:$src, PSHUFD_shuffle_mask:$sm))>; (v4i32 (PSHUFDrr VR128:$src, PSHUFD_shuffle_mask:$sm))>,
Requires<[HasSSE2]>;