mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Minor bug fix. LowerSubregs should translate
%S0<def> = EXTRACT_SUBREG %Q0<kill>, 1 to %S0<def> = IMPLICIT_DEF %Q0<imp-use,kill> Implicit_def does not *read* any register so the operand should be marked "implicit". The missing "implicit" marker on the operand is wrong, but it doesn't actually break anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82503 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
850c9178dc
commit
1c17c1bc54
@ -130,6 +130,7 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
|
||||
// instruction with IMPLICIT_DEF.
|
||||
MI->setDesc(TII.get(TargetInstrInfo::IMPLICIT_DEF));
|
||||
MI->RemoveOperand(2); // SubIdx
|
||||
MI->getOperand(1).setImplicit(true);
|
||||
DEBUG(errs() << "subreg: replace by: " << *MI);
|
||||
return true;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user