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[mips] Remove fmt from the parameter list of classes FMADDSUB and FNMADDSUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170057 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -149,16 +149,16 @@ multiclass FFR2P_M<bits<6> funct, string opstr, SDNode OpNode, bit isComm = 0> {
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}
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// FP madd/msub/nmadd/nmsub instruction classes.
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class FMADDSUB<bits<3> funct, bits<3> fmt, string opstr, string fmtstr,
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class FMADDSUB<bits<3> funct, bits<3> fmt, string opstr,
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SDNode OpNode, RegisterClass RC> :
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FFMADDSUB<funct, fmt, (outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft),
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!strconcat(opstr, ".", fmtstr, "\t$fd, $fr, $fs, $ft"),
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!strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
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[(set RC:$fd, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr))]>;
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class FNMADDSUB<bits<3> funct, bits<3> fmt, string opstr, string fmtstr,
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class FNMADDSUB<bits<3> funct, bits<3> fmt, string opstr,
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SDNode OpNode, RegisterClass RC> :
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FFMADDSUB<funct, fmt, (outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft),
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!strconcat(opstr, ".", fmtstr, "\t$fd, $fr, $fs, $ft"),
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!strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
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[(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))]>;
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//===----------------------------------------------------------------------===//
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@ -334,34 +334,34 @@ def FSUB_S : FFR2P<0x01, 16, "sub.s", FGR32, fsub>;
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defm FSUB : FFR2P_M<0x01, "sub.d", fsub>;
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let Predicates = [HasMips32r2, HasStdEnc] in {
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def MADD_S : FMADDSUB<0x4, 0, "madd", "s", fadd, FGR32>;
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def MSUB_S : FMADDSUB<0x5, 0, "msub", "s", fsub, FGR32>;
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def MADD_S : FMADDSUB<0x4, 0, "madd.s", fadd, FGR32>;
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def MSUB_S : FMADDSUB<0x5, 0, "msub.s", fsub, FGR32>;
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}
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let Predicates = [HasMips32r2, NoNaNsFPMath, HasStdEnc] in {
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def NMADD_S : FNMADDSUB<0x6, 0, "nmadd", "s", fadd, FGR32>;
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def NMSUB_S : FNMADDSUB<0x7, 0, "nmsub", "s", fsub, FGR32>;
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def NMADD_S : FNMADDSUB<0x6, 0, "nmadd.s", fadd, FGR32>;
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def NMSUB_S : FNMADDSUB<0x7, 0, "nmsub.s", fsub, FGR32>;
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}
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let Predicates = [HasMips32r2, NotFP64bit, HasStdEnc] in {
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def MADD_D32 : FMADDSUB<0x4, 1, "madd", "d", fadd, AFGR64>;
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def MSUB_D32 : FMADDSUB<0x5, 1, "msub", "d", fsub, AFGR64>;
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def MADD_D32 : FMADDSUB<0x4, 1, "madd.d", fadd, AFGR64>;
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def MSUB_D32 : FMADDSUB<0x5, 1, "msub.d", fsub, AFGR64>;
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}
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let Predicates = [HasMips32r2, NotFP64bit, NoNaNsFPMath, HasStdEnc] in {
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def NMADD_D32 : FNMADDSUB<0x6, 1, "nmadd", "d", fadd, AFGR64>;
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def NMSUB_D32 : FNMADDSUB<0x7, 1, "nmsub", "d", fsub, AFGR64>;
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def NMADD_D32 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, AFGR64>;
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def NMSUB_D32 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, AFGR64>;
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}
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let Predicates = [HasMips32r2, IsFP64bit, HasStdEnc], isCodeGenOnly=1 in {
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def MADD_D64 : FMADDSUB<0x4, 1, "madd", "d", fadd, FGR64>;
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def MSUB_D64 : FMADDSUB<0x5, 1, "msub", "d", fsub, FGR64>;
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def MADD_D64 : FMADDSUB<0x4, 1, "madd.d", fadd, FGR64>;
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def MSUB_D64 : FMADDSUB<0x5, 1, "msub.d", fsub, FGR64>;
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}
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let Predicates = [HasMips32r2, IsFP64bit, NoNaNsFPMath, HasStdEnc],
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isCodeGenOnly=1 in {
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def NMADD_D64 : FNMADDSUB<0x6, 1, "nmadd", "d", fadd, FGR64>;
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def NMSUB_D64 : FNMADDSUB<0x7, 1, "nmsub", "d", fsub, FGR64>;
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def NMADD_D64 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, FGR64>;
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def NMSUB_D64 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, FGR64>;
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}
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//===----------------------------------------------------------------------===//
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