diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp
index f1695e2ce20..ea80af48d3e 100644
--- a/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
     Subtarget(TT, CPU, FS),
     InstrInfo(Subtarget),
-    DL("e-p:64:64-i64:64:64-i128:128:128-s0:32:32-f128:128:128-n32:64-S128"),
+    DL("e-p:64:64-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
     TLInfo(*this),
     TSInfo(*this),
     FrameLowering(Subtarget) {
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 0808da4a72c..d5cde41b11d 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -75,9 +75,9 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
   // aligned s them to 32 bits, others to 64 bits. We always try to align to
   // 64 bits.
   if (ST.isAPCS_ABI())
-    Ret += "-f64:32:64-i64:32:64";
+    Ret += "-f64:32:64";
   else
-    Ret += "-f64:64:64-i64:64:64";
+    Ret += "-i64:64:64";
 
   // On thumb, i16,i18 and i1 have natural aligment requirements, but we try to
   // align to 32.
@@ -89,7 +89,7 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
   if (ST.isAPCS_ABI())
     Ret += "-v128:32:128-v64:32:64";
   else
-    Ret += "-v128:64:128-v64:64:64";
+    Ret += "-v128:64:128";
 
   // An aggregate of size 0 is ABI aligned to 0.
   // FIXME: explain better what this means.