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Simplify the datalayout string of ARM and AArch64.
No functionality change. Reviewed by Tim Northover. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197172 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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Subtarget(TT, CPU, FS),
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InstrInfo(Subtarget),
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DL("e-p:64:64-i64:64:64-i128:128:128-s0:32:32-f128:128:128-n32:64-S128"),
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DL("e-p:64:64-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
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TLInfo(*this),
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TSInfo(*this),
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FrameLowering(Subtarget) {
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@ -75,9 +75,9 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
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// aligned s them to 32 bits, others to 64 bits. We always try to align to
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// 64 bits.
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if (ST.isAPCS_ABI())
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Ret += "-f64:32:64-i64:32:64";
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Ret += "-f64:32:64";
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else
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Ret += "-f64:64:64-i64:64:64";
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Ret += "-i64:64:64";
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// On thumb, i16,i18 and i1 have natural aligment requirements, but we try to
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// align to 32.
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@ -89,7 +89,7 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
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if (ST.isAPCS_ABI())
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Ret += "-v128:32:128-v64:32:64";
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else
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Ret += "-v128:64:128-v64:64:64";
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Ret += "-v128:64:128";
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// An aggregate of size 0 is ABI aligned to 0.
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// FIXME: explain better what this means.
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