mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not
am2offset. Modified the instruction table entry and added a new test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
7c52f2ee06
commit
1cfa094562
@ -1232,7 +1232,7 @@ def LDRBT : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb),
|
||||
}
|
||||
|
||||
def LDRSBT : AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb),
|
||||
(ins GPR:$base,am2offset:$offset), LdMiscFrm, IIC_iLoadru,
|
||||
(ins GPR:$base,am3offset:$offset), LdMiscFrm, IIC_iLoadru,
|
||||
"ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
|
||||
let Inst{21} = 1; // overwrite
|
||||
}
|
||||
|
@ -18,6 +18,9 @@
|
||||
# CHECK: ldr r0, [r2], #15
|
||||
0x0f 0x00 0x92 0xe4
|
||||
|
||||
# CHECK: ldrsbtvs lr, [r2], -r9
|
||||
0xd9 0xe9 0x32 0x60
|
||||
|
||||
# CHECK: lsls r0, r2, #31
|
||||
0x82 0x0f 0xb0 0xe1
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user