From 1d16fdecd63c1e36802d04531f69b40b9a8e7e18 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Mon, 21 Apr 2014 09:34:48 +0000 Subject: [PATCH] [C++11] Replace OwningPtr with std::unique_ptr in places where it doesn't break the API. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206740 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/ADT/edit_distance.h | 4 ++-- include/llvm/CodeGen/LiveRegMatrix.h | 3 +-- include/llvm/CodeGen/RegisterClassInfo.h | 7 +++---- include/llvm/LineEditor/LineEditor.h | 4 ++-- include/llvm/MC/MCDisassembler.h | 1 - lib/Target/ARM/ARMTargetMachine.h | 5 ++--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 3 +-- lib/Target/Hexagon/HexagonMachineScheduler.h | 1 - lib/Target/Mips/MipsDelaySlotFiller.cpp | 2 +- lib/Target/Mips/MipsTargetMachine.h | 19 +++++++++---------- lib/Target/NVPTX/NVPTXTargetMachine.cpp | 1 - lib/Target/R600/AMDGPUTargetMachine.h | 5 ++--- 12 files changed, 23 insertions(+), 32 deletions(-) diff --git a/include/llvm/ADT/edit_distance.h b/include/llvm/ADT/edit_distance.h index f77ef13fef2..9ee1edc54e0 100644 --- a/include/llvm/ADT/edit_distance.h +++ b/include/llvm/ADT/edit_distance.h @@ -17,8 +17,8 @@ #define LLVM_ADT_EDIT_DISTANCE_H #include "llvm/ADT/ArrayRef.h" -#include "llvm/ADT/OwningPtr.h" #include +#include namespace llvm { @@ -57,7 +57,7 @@ unsigned ComputeEditDistance(ArrayRef FromArray, ArrayRef ToArray, const unsigned SmallBufferSize = 64; unsigned SmallBuffer[SmallBufferSize]; - llvm::OwningArrayPtr Allocated; + std::unique_ptr Allocated; unsigned *Previous = SmallBuffer; if (2*(n + 1) > SmallBufferSize) { Previous = new unsigned [2*(n+1)]; diff --git a/include/llvm/CodeGen/LiveRegMatrix.h b/include/llvm/CodeGen/LiveRegMatrix.h index 28b819bb6fa..878b4d9836f 100644 --- a/include/llvm/CodeGen/LiveRegMatrix.h +++ b/include/llvm/CodeGen/LiveRegMatrix.h @@ -25,7 +25,6 @@ #define LLVM_CODEGEN_LIVEREGMATRIX_H #include "llvm/ADT/BitVector.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/CodeGen/LiveIntervalUnion.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -51,7 +50,7 @@ class LiveRegMatrix : public MachineFunctionPass { LiveIntervalUnion::Array Matrix; // Cached queries per register unit. - OwningArrayPtr Queries; + std::unique_ptr Queries; // Cached register mask interference info. unsigned RegMaskTag; diff --git a/include/llvm/CodeGen/RegisterClassInfo.h b/include/llvm/CodeGen/RegisterClassInfo.h index dd51872a4c4..d784dfbda7e 100644 --- a/include/llvm/CodeGen/RegisterClassInfo.h +++ b/include/llvm/CodeGen/RegisterClassInfo.h @@ -19,7 +19,6 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/Target/TargetRegisterInfo.h" namespace llvm { @@ -31,7 +30,7 @@ class RegisterClassInfo { bool ProperSubClass; uint8_t MinCost; uint16_t LastCostChange; - OwningArrayPtr Order; + std::unique_ptr Order; RCInfo() : Tag(0), NumRegs(0), ProperSubClass(false), MinCost(0), @@ -43,7 +42,7 @@ class RegisterClassInfo { }; // Brief cached information for each register class. - OwningArrayPtr RegClass; + std::unique_ptr RegClass; // Tag changes whenever cached information needs to be recomputed. An RCInfo // entry is valid when its tag matches. @@ -62,7 +61,7 @@ class RegisterClassInfo { // Reserved registers in the current MF. BitVector Reserved; - OwningArrayPtr PSetLimits; + std::unique_ptr PSetLimits; // Compute all information about RC. void compute(const TargetRegisterClass *RC) const; diff --git a/include/llvm/LineEditor/LineEditor.h b/include/llvm/LineEditor/LineEditor.h index 42839edde0b..1a9a6910603 100644 --- a/include/llvm/LineEditor/LineEditor.h +++ b/include/llvm/LineEditor/LineEditor.h @@ -11,9 +11,9 @@ #define LLVM_LINEEDITOR_LINEEDITOR_H #include "llvm/ADT/Optional.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/StringRef.h" -#include +#include +#include #include #include diff --git a/include/llvm/MC/MCDisassembler.h b/include/llvm/MC/MCDisassembler.h index 169304ebd6a..9d441bbd88f 100644 --- a/include/llvm/MC/MCDisassembler.h +++ b/include/llvm/MC/MCDisassembler.h @@ -10,7 +10,6 @@ #define LLVM_MC_MCDISASSEMBLER_H #include "llvm-c/Disassembler.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/MC/MCRelocationInfo.h" #include "llvm/MC/MCSymbolizer.h" #include "llvm/Support/DataTypes.h" diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index b77effc9c43..389839eae90 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -23,7 +23,6 @@ #include "Thumb1FrameLowering.h" #include "Thumb1InstrInfo.h" #include "Thumb2InstrInfo.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/IR/DataLayout.h" #include "llvm/MC/MCStreamer.h" #include "llvm/Target/TargetMachine.h" @@ -128,12 +127,12 @@ public: class ThumbTargetMachine : public ARMBaseTargetMachine { virtual void anchor(); // Either Thumb1InstrInfo or Thumb2InstrInfo. - OwningPtr InstrInfo; + std::unique_ptr InstrInfo; const DataLayout DL; // Calculates type size & alignment ARMTargetLowering TLInfo; ARMSelectionDAGInfo TSInfo; // Either Thumb1FrameLowering or ARMFrameLowering. - OwningPtr FrameLowering; + std::unique_ptr FrameLowering; public: ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 0e5fd1f6e0c..f2e92c8f4f8 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -13,7 +13,6 @@ #include "MCTargetDesc/ARMArchName.h" #include "MCTargetDesc/ARMBaseInfo.h" #include "MCTargetDesc/ARMMCExpr.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" @@ -2917,7 +2916,7 @@ int ARMAsmParser::tryParseShiftRegister( // The source register for the shift has already been added to the // operand list, so we need to pop it off and combine it into the shifted // register operand instead. - OwningPtr PrevOp((ARMOperand*)Operands.pop_back_val()); + std::unique_ptr PrevOp((ARMOperand*)Operands.pop_back_val()); if (!PrevOp->isReg()) return Error(PrevOp->getStartLoc(), "shift must be of a register"); int SrcReg = PrevOp->getReg(); diff --git a/lib/Target/Hexagon/HexagonMachineScheduler.h b/lib/Target/Hexagon/HexagonMachineScheduler.h index 300f1c7e9e9..0d4a29eb895 100644 --- a/lib/Target/Hexagon/HexagonMachineScheduler.h +++ b/lib/Target/Hexagon/HexagonMachineScheduler.h @@ -14,7 +14,6 @@ #ifndef HEXAGONASMPRINTER_H #define HEXAGONASMPRINTER_H -#include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/PriorityQueue.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp index a1a0e063887..7abfa2f34e6 100644 --- a/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -610,7 +610,7 @@ bool Filler::searchSuccBBs(MachineBasicBlock &MBB, Iter Slot) const { RegDefsUses RegDU(TM); bool HasMultipleSuccs = false; BB2BrMap BrMap; - OwningPtr IM; + std::unique_ptr IM; Iter Filler; // Iterate over SuccBB's predecessor list. diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index 5a9a11d861c..1179a93db63 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -20,7 +20,6 @@ #include "MipsJITInfo.h" #include "MipsSelectionDAGInfo.h" #include "MipsSubtarget.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/IR/DataLayout.h" @@ -34,15 +33,15 @@ class MipsRegisterInfo; class MipsTargetMachine : public LLVMTargetMachine { MipsSubtarget Subtarget; const DataLayout DL; // Calculates type size & alignment - OwningPtr InstrInfo; - OwningPtr FrameLowering; - OwningPtr TLInfo; - OwningPtr InstrInfo16; - OwningPtr FrameLowering16; - OwningPtr TLInfo16; - OwningPtr InstrInfoSE; - OwningPtr FrameLoweringSE; - OwningPtr TLInfoSE; + std::unique_ptr InstrInfo; + std::unique_ptr FrameLowering; + std::unique_ptr TLInfo; + std::unique_ptr InstrInfo16; + std::unique_ptr FrameLowering16; + std::unique_ptr TLInfo16; + std::unique_ptr InstrInfoSE; + std::unique_ptr FrameLoweringSE; + std::unique_ptr TLInfoSE; MipsSelectionDAGInfo TSInfo; const InstrItineraryData &InstrItins; MipsJITInfo JITInfo; diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 7510da502f2..222662749b4 100644 --- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -16,7 +16,6 @@ #include "NVPTX.h" #include "NVPTXAllocaHoisting.h" #include "NVPTXLowerAggrCopies.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/Analysis/Passes.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineFunctionAnalysis.h" diff --git a/lib/Target/R600/AMDGPUTargetMachine.h b/lib/Target/R600/AMDGPUTargetMachine.h index f942614fe76..783c5567134 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.h +++ b/lib/Target/R600/AMDGPUTargetMachine.h @@ -20,7 +20,6 @@ #include "AMDGPUSubtarget.h" #include "AMDILIntrinsicInfo.h" #include "R600ISelLowering.h" -#include "llvm/ADT/OwningPtr.h" #include "llvm/IR/DataLayout.h" namespace llvm { @@ -31,8 +30,8 @@ class AMDGPUTargetMachine : public LLVMTargetMachine { const DataLayout Layout; AMDGPUFrameLowering FrameLowering; AMDGPUIntrinsicInfo IntrinsicInfo; - OwningPtr InstrInfo; - OwningPtr TLInfo; + std::unique_ptr InstrInfo; + std::unique_ptr TLInfo; const InstrItineraryData *InstrItins; public: